1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
8 .macro imx7ulp_ddr_freq_decrease
58 .macro imx7ulp_evk_ddr_setting
60 imx7ulp_ddr_freq_decrease
62 /* Enable MMDC PCC clock */
67 /* Configure DDR pad */
204 .macro imx7ulp_clock_gating
207 .macro imx7ulp_qos_setting
210 .macro imx7ulp_ddr_setting
211 imx7ulp_evk_ddr_setting
214 /* include the common plugin code here */
215 #include <asm/arch/mx7ulp_plugin.S>