board_f: Drop setup_dram_config() wrapper
[oweals/u-boot.git] / board / freescale / mx53smd / mx53smd.c
1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/arch/crm_regs.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/iomux-mx53.h>
14 #include <linux/errno.h>
15 #include <netdev.h>
16 #include <mmc.h>
17 #include <fsl_esdhc.h>
18 #include <asm/gpio.h>
19
20 DECLARE_GLOBAL_DATA_PTR;
21
22 int dram_init(void)
23 {
24         u32 size1, size2;
25
26         size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
27         size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
28
29         gd->ram_size = size1 + size2;
30
31         return 0;
32 }
33 int dram_init_banksize(void)
34 {
35         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
36         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
37
38         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
39         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
40
41         return 0;
42 }
43
44 #define UART_PAD_CTRL   (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
45                          PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
46
47 static void setup_iomux_uart(void)
48 {
49         static const iomux_v3_cfg_t uart_pads[] = {
50                 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
51                 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
52         };
53
54         imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
55 }
56
57 static void setup_iomux_fec(void)
58 {
59         static const iomux_v3_cfg_t fec_pads[] = {
60                 NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
61                         PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE),
62                 NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
63                 NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
64                                 PAD_CTL_HYS | PAD_CTL_PKE),
65                 NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
66                                 PAD_CTL_HYS | PAD_CTL_PKE),
67                 NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
68                 NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
69                 NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
70                 NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
71                                 PAD_CTL_HYS | PAD_CTL_PKE),
72                 NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
73                                 PAD_CTL_HYS | PAD_CTL_PKE),
74                 NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
75                                 PAD_CTL_HYS | PAD_CTL_PKE),
76         };
77
78         imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
79 }
80
81 #ifdef CONFIG_FSL_ESDHC
82 struct fsl_esdhc_cfg esdhc_cfg[1] = {
83         {MMC_SDHC1_BASE_ADDR},
84 };
85
86 int board_mmc_getcd(struct mmc *mmc)
87 {
88         imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13);
89         gpio_direction_input(IMX_GPIO_NR(3, 13));
90         return !gpio_get_value(IMX_GPIO_NR(3, 13));
91 }
92
93 #define SD_CMD_PAD_CTRL         (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
94                                  PAD_CTL_PUS_100K_UP)
95 #define SD_PAD_CTRL             (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
96                                  PAD_CTL_DSE_HIGH)
97
98 int board_mmc_init(bd_t *bis)
99 {
100         static const iomux_v3_cfg_t sd1_pads[] = {
101                 NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
102                 NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
103                 NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
104                 NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
105                 NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
106                 NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
107                 MX53_PAD_EIM_DA13__GPIO3_13,
108         };
109
110         u32 index;
111         int ret;
112
113         esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
114
115         for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
116                 switch (index) {
117                 case 0:
118                         imx_iomux_v3_setup_multiple_pads(sd1_pads,
119                                                          ARRAY_SIZE(sd1_pads));
120                         break;
121
122                 default:
123                         printf("Warning: you configured more ESDHC controller"
124                                 "(%d) as supported by the board(1)\n",
125                                 CONFIG_SYS_FSL_ESDHC_NUM);
126                         return -EINVAL;
127                 }
128                 ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
129                 if (ret)
130                         return ret;
131         }
132
133         return 0;
134 }
135 #endif
136
137 int board_early_init_f(void)
138 {
139         setup_iomux_uart();
140         setup_iomux_fec();
141
142         return 0;
143 }
144
145 int board_init(void)
146 {
147         /* address of boot parameters */
148         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
149
150         return 0;
151 }
152
153 int checkboard(void)
154 {
155         puts("Board: MX53SMD\n");
156
157         return 0;
158 }