board/freescale/mpc8641hpcn/law.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2008,2010-2011 Freescale Semiconductor, Inc.
   4  *
   5  * (C) Copyright 2000
   6  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7  */
   8
   9 #include <common.h>
  10 #include <asm/fsl_law.h>
  11 #include <asm/mmu.h>
  12
  13 /*
  14  * LAW(Local Access Window) configuration:
  15  *
  16  * 0x0000_0000     0x7fff_ffff     DDR                     2G
  17  * if PCI (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT)
  18  * 0x8000_0000     0x9fff_ffff     PCIE1 MEM                512M
  19  * 0xa000_0000     0xbfff_ffff     PCIE2 MEM                512M
  20  * else if RIO (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT)
  21  * 0x8000_0000     0x9fff_ffff     RapidIO                 512M
  22  * endif
  23  * (prepend 0xf_0000_0000 if CONFIG_PHYS_64BIT)
  24  * 0xffc0_0000     0xffc0_ffff     PCIE1 IO                 64K
  25  * 0xffc1_0000     0xffc1_ffff     PCIE2 IO                 64K
  26  * 0xffe0_0000     0xffef_ffff     CCSRBAR                 1M
  27  * 0xffdf_0000     0xffe0_0000     PIXIS, CF               64K
  28  * 0xef80_0000     0xefff_ffff     FLASH (boot bank)       8M
  29  *
  30  * Notes:
  31  *    CCSRBAR doesn't need a configured Local Access Window.
  32  *    If flash is 8M at default position (last 8M), no LAW needed.
  33  */
  34
  35 struct law_entry law_table[] = {
  36 #if !defined(CONFIG_SPD_EEPROM)
  37         SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
  38 #endif
  39         SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
  40         SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_LBC),
  41 };
  42
  43 int num_law_entries = ARRAY_SIZE(law_table);