1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
13 #include <asm/fsl_i2c.h>
15 static struct pci_region pci1_regions[] = {
17 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
18 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
19 size: CONFIG_SYS_PCI1_MEM_SIZE,
20 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
23 bus_start: CONFIG_SYS_PCI1_IO_BASE,
24 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
25 size: CONFIG_SYS_PCI1_IO_SIZE,
29 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
30 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
31 size: CONFIG_SYS_PCI1_MMIO_SIZE,
36 #ifdef CONFIG_MPC83XX_PCI2
37 static struct pci_region pci2_regions[] = {
39 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
40 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
41 size: CONFIG_SYS_PCI2_MEM_SIZE,
42 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
45 bus_start: CONFIG_SYS_PCI2_IO_BASE,
46 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
47 size: CONFIG_SYS_PCI2_IO_SIZE,
51 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
52 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
53 size: CONFIG_SYS_PCI2_MMIO_SIZE,
59 #ifndef CONFIG_PCISLAVE
62 u8 val8, orig_i2c_bus;
64 * Assign PIB PMC slot to desired PCI bus
66 /* Switch temporarily to I2C bus #2 */
67 orig_i2c_bus = i2c_get_bus_num();
71 i2c_write(0x23, 0x6, 1, &val8, 1);
72 i2c_write(0x23, 0x7, 1, &val8, 1);
74 i2c_write(0x23, 0x2, 1, &val8, 1);
75 i2c_write(0x23, 0x3, 1, &val8, 1);
78 i2c_write(0x26, 0x6, 1, &val8, 1);
80 i2c_write(0x26, 0x7, 1, &val8, 1);
81 #if defined(CONFIG_PCI_64BIT)
82 val8 = 0xf4; /* PMC2:PCI1/64-bit */
83 #elif defined(CONFIG_PCI_ALL_PCI1)
84 val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
85 #elif defined(CONFIG_PCI_ONE_PCI1)
86 val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
88 val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
90 i2c_write(0x26, 0x2, 1, &val8, 1);
92 i2c_write(0x26, 0x3, 1, &val8, 1);
94 i2c_write(0x27, 0x6, 1, &val8, 1);
95 i2c_write(0x27, 0x7, 1, &val8, 1);
97 i2c_write(0x27, 0x2, 1, &val8, 1);
99 i2c_write(0x27, 0x3, 1, &val8, 1);
102 #if defined(CONFIG_PCI_64BIT)
103 printf("PCI1: 64-bit on PMC2\n");
104 #elif defined(CONFIG_PCI_ALL_PCI1)
105 printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
106 #elif defined(CONFIG_PCI_ONE_PCI1)
107 printf("PCI1: 32-bit on PMC1\n");
108 printf("PCI2: 32-bit on PMC2, PMC3\n");
110 printf("PCI1: 32-bit on PMC1, PMC2\n");
111 printf("PCI2: 32-bit on PMC3\n");
113 /* Reset to original I2C bus */
114 i2c_set_bus_num(orig_i2c_bus);
117 void pci_init_board(void)
119 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
120 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
121 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
122 #ifndef CONFIG_MPC83XX_PCI2
123 struct pci_region *reg[] = { pci1_regions };
125 struct pci_region *reg[] = { pci1_regions, pci2_regions };
128 /* initialize the PCA9555PW IO expander on the PIB board */
131 /* Enable all 8 PCI_CLK_OUTPUTS */
132 clk->occr = 0xff000000;
135 /* Configure PCI Local Access Windows */
136 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
137 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
139 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
140 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
144 #ifndef CONFIG_MPC83XX_PCI2
145 mpc83xx_pci_init(1, reg);
147 mpc83xx_pci_init(2, reg);
152 void pci_init_board(void)
154 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
155 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
156 volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
157 struct pci_region *reg[] = { pci1_regions };
159 /* Configure PCI Local Access Windows */
160 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
161 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
163 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
164 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
166 mpc83xx_pci_init(1, reg);
168 /* Configure PCI Inbound Translation Windows (3 1MB windows) */
169 pci_ctrl->pitar0 = 0x0;
170 pci_ctrl->pibar0 = 0x0;
171 pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
172 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
174 pci_ctrl->pitar1 = 0x0;
175 pci_ctrl->pibar1 = 0x0;
176 pci_ctrl->piebar1 = 0x0;
177 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
178 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
180 pci_ctrl->pitar2 = 0x0;
181 pci_ctrl->pibar2 = 0x0;
182 pci_ctrl->piebar2 = 0x0;
183 pci_ctrl->piwar2 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
184 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
186 /* Unlock the configuration bit */
187 mpc83xx_pcislave_unlock(0);
188 printf("PCI: Agent mode enabled\n");
190 #endif /* CONFIG_PCISLAVE */