2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 typedef unsigned short FLASH_PORT_WIDTH;
32 typedef volatile unsigned short FLASH_PORT_WIDTHV;
34 #define PHYS_FLASH_1 CFG_FLASH_BASE
35 #define FLASH_BANK_SIZE 0x200000
37 #define FPW FLASH_PORT_WIDTH
38 #define FPWV FLASH_PORT_WIDTHV
40 /* Intel-compatible flash commands */
41 #define INTEL_PROGRAM 0x00100010
42 #define INTEL_ERASE 0x00200020
43 #define INTEL_WRSETUP 0x00400040
44 #define INTEL_CLEAR 0x00500050
45 #define INTEL_LOCKBIT 0x00600060
46 #define INTEL_PROTECT 0x00010001
47 #define INTEL_STATUS 0x00700070
48 #define INTEL_READID 0x00900090
49 #define INTEL_CFIQRY 0x00980098
50 #define INTEL_SUSERASE 0x00B000B0
51 #define INTEL_PROTPROG 0x00C000C0
52 #define INTEL_CONFIRM 0x00D000D0
53 #define INTEL_RESET 0x00FF00FF
55 /* Intel-compatible flash status bits */
56 #define INTEL_FINISHED 0x00800080
57 #define INTEL_OK 0x00800080
58 #define INTEL_ERASESUS 0x00600060
59 #define INTEL_WSM_SUS (INTEL_FINISHED | INTEL_ERASESUS)
61 /* 28F160C3B CFI Data offset - This could vary */
62 #define INTEL_CFI_MFG 0x00 /* Manufacturer ID */
63 #define INTEL_CFI_PART 0x01 /* Product ID */
64 #define INTEL_CFI_LOCK 0x02 /* */
65 #define INTEL_CFI_TWPRG 0x1F /* Typical Single Word Program Timeout 2^n us */
66 #define INTEL_CFI_MBUFW 0x20 /* Typical Max Buffer Write Timeout 2^n us */
67 #define INTEL_CFI_TERB 0x21 /* Typical Block Erase Timeout 2^n ms */
68 #define INTEL_CFI_MWPRG 0x23 /* Maximum Word program timeout 2^n us */
69 #define INTEL_CFI_MERB 0x25 /* Maximum Block Erase Timeout 2^n s */
70 #define INTEL_CFI_SIZE 0x27 /* Device size 2^n bytes */
71 #define INTEL_CFI_BANK 0x2C /* Number of Bank */
72 #define INTEL_CFI_SZ1A 0x2F /* Block Region Size */
73 #define INTEL_CFI_SZ1B 0x30
74 #define INTEL_CFI_SZ2A 0x33
75 #define INTEL_CFI_SZ2B 0x34
76 #define INTEL_CFI_BLK1 0x2D /* Number of Blocks */
77 #define INTEL_CFI_BLK2 0x31
81 #define SYNC __asm__("nop")
83 /*-----------------------------------------------------------------------
87 ulong flash_get_size(FPWV * addr, flash_info_t * info);
88 int flash_get_offsets(ulong base, flash_info_t * info);
89 int flash_cmd_rd(FPWV * addr, int index);
90 int write_data(flash_info_t * info, ulong dest, FPW data);
91 void flash_sync_real_protect(flash_info_t * info);
92 uchar intel_sector_protected(flash_info_t * info, ushort sector);
94 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
96 ulong flash_init(void)
98 FPWV *flash_addr[CFG_MAX_FLASH_BANKS];
102 flash_addr[0] = (FPW *) CFG_FLASH0_BASE;
103 #ifdef CFG_FLASH1_BASE
104 flash_addr[1] = (FPW *) CFG_FLASH1_BASE;
107 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
108 memset(&flash_info[i], 0, sizeof(flash_info_t));
110 size = flash_get_size(flash_addr[i], &flash_info[i]);
111 flash_protect(FLAG_PROTECT_CLEAR,
112 flash_info[i].start[0],
113 flash_info[i].start[0] + size - 1,
115 /* get the h/w and s/w protection status in sync */
116 flash_sync_real_protect(&flash_info[i]);
119 /* Protect monitor and environment sectors */
120 flash_protect(FLAG_PROTECT_SET,
122 CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
127 void flash_print_info(flash_info_t * info)
131 switch (info->flash_id & FLASH_VENDMASK) {
132 case FLASH_MAN_INTEL:
136 printf("Unknown Vendor ");
140 switch (info->flash_id & FLASH_TYPEMASK) {
141 case FLASH_28F160C3B:
142 printf("28F160C3B\n");
144 case FLASH_28F160C3T:
145 printf("28F160C3T\n");
147 case FLASH_28F320C3B:
148 printf("28F320C3B\n");
150 case FLASH_28F320C3T:
151 printf("28F320C3T\n");
153 case FLASH_28F640C3B:
154 printf("28F640C3B\n");
156 case FLASH_28F640C3T:
157 printf("28F640C3T\n");
160 printf("Unknown Chip Type\n");
164 if (info->size > 0x100000) {
167 printf(" Size: %ld", info->size >> 20);
169 remainder = (info->size % 0x100000);
172 remainder = (int)((float)
173 (((float)remainder / (float)1024) *
175 printf(".%d ", remainder);
178 printf("MB in %d Sectors\n", info->sector_count);
180 printf(" Size: %ld KB in %d Sectors\n",
181 info->size >> 10, info->sector_count);
183 printf(" Sector Start Addresses:");
184 for (i = 0; i < info->sector_count; ++i) {
188 info->start[i], info->protect[i] ? " (RO)" : " ");
194 * The following code cannot be run from FLASH!
196 ulong flash_get_size(FPWV * addr, flash_info_t * info)
202 /* Write auto select command: read Manufacturer ID */
203 /* Write auto select command sequence and test FLASH answer */
204 *addr = (FPW) INTEL_RESET; /* restore read mode */
205 *addr = (FPW) INTEL_READID;
207 switch (addr[INTEL_CFI_MFG] & 0xff) {
208 case (ushort) INTEL_MANUFACT:
209 info->flash_id = FLASH_MAN_INTEL;
210 value = addr[INTEL_CFI_PART];
214 printf("Unknown Flash\n");
215 info->flash_id = FLASH_UNKNOWN;
216 info->sector_count = 0;
218 *addr = (FPW) INTEL_RESET; /* restore read mode */
219 return (0); /* no or unknown flash */
223 case (u16) INTEL_ID_28F160C3B:
224 info->flash_id += FLASH_28F160C3B;
226 case (u16) INTEL_ID_28F160C3T:
227 info->flash_id += FLASH_28F160C3T;
229 case (u16) INTEL_ID_28F320C3B:
230 info->flash_id += FLASH_28F320C3B;
232 case (u16) INTEL_ID_28F320C3T:
233 info->flash_id += FLASH_28F320C3T;
235 case (u16) INTEL_ID_28F640C3B:
236 info->flash_id += FLASH_28F640C3B;
238 case (u16) INTEL_ID_28F640C3T:
239 info->flash_id += FLASH_28F640C3T;
242 info->flash_id = FLASH_UNKNOWN;
247 /* Intel spec. under CFI section */
248 u32 sz, size, offset;
249 int sec, sectors, bs;
252 part = flash_cmd_rd(addr, INTEL_CFI_BANK);
254 /* Geometry y1 = y1 + 1, y2 = y2 + 1, CFI spec.
255 * To be exact, Z = [0x2f 0x30] (LE) * 256 bytes * [0x2D 0x2E] block count
256 * Z = [0x33 0x34] (LE) * 256 bytes * [0x31 0x32] block count
261 for (i = 0; i < part; i++) {
262 bs = (((addr[INTEL_CFI_SZ1B + i * 4] << 8) |
263 addr[INTEL_CFI_SZ1A + i * 4]) * 0x100);
264 sec = addr[INTEL_CFI_BLK1 + i * 4] + 1;
267 for (j = 0; j < sec; j++) {
268 info->start[cnt++] = offset;
275 info->sector_count = sectors;
279 if (info->sector_count > CFG_MAX_FLASH_SECT) {
280 printf("** ERROR: sector count %d > max (%d) **\n",
281 info->sector_count, CFG_MAX_FLASH_SECT);
282 info->sector_count = CFG_MAX_FLASH_SECT;
285 *addr = (FPW) INTEL_RESET; /* restore read mode */
290 int flash_cmd_rd(FPWV * addr, int index)
292 return (int)addr[index];
296 * This function gets the u-boot flash sector protection status
297 * (flash_info_t.protect[]) in sync with the sector protection
298 * status stored in hardware.
300 void flash_sync_real_protect(flash_info_t * info)
304 switch (info->flash_id & FLASH_TYPEMASK) {
305 case FLASH_28F160C3B:
306 case FLASH_28F160C3T:
307 case FLASH_28F320C3B:
308 case FLASH_28F320C3T:
309 case FLASH_28F640C3B:
310 case FLASH_28F640C3T:
311 for (i = 0; i < info->sector_count; ++i) {
312 info->protect[i] = intel_sector_protected(info, i);
316 /* no h/w protect support */
322 * checks if "sector" in bank "info" is protected. Should work on intel
323 * strata flash chips 28FxxxJ3x in 8-bit mode.
324 * Returns 1 if sector is protected (or timed-out while trying to read
325 * protection status), 0 if it is not.
327 uchar intel_sector_protected(flash_info_t * info, ushort sector)
330 FPWV *lock_conf_addr;
335 * first, wait for the WSM to be finished. The rationale for
336 * waiting for the WSM to become idle for at most
337 * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
338 * because of: (1) erase, (2) program or (3) lock bit
339 * configuration. So we just wait for the longest timeout of
340 * the (1)-(3), i.e. the erase timeout.
343 /* wait at least 35ns (W12) before issuing Read Status Register */
345 addr = (FPWV *) info->start[sector];
346 *addr = (FPW) INTEL_STATUS;
348 start = get_timer(0);
349 while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
350 if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
351 *addr = (FPW) INTEL_RESET; /* restore read mode */
352 printf("WSM busy too long, can't get prot status\n");
357 /* issue the Read Identifier Codes command */
358 *addr = (FPW) INTEL_READID;
360 /* Intel example code uses offset of 4 for 8-bit flash */
361 lock_conf_addr = (FPWV *) info->start[sector];
362 ret = (lock_conf_addr[INTEL_CFI_LOCK] & (FPW) INTEL_PROTECT) ? 1 : 0;
364 /* put flash back in read mode */
365 *addr = (FPW) INTEL_RESET;
370 int flash_erase(flash_info_t * info, int s_first, int s_last)
372 int flag, prot, sect;
373 ulong type, start, last;
376 if ((s_first < 0) || (s_first > s_last)) {
377 if (info->flash_id == FLASH_UNKNOWN)
378 printf("- missing\n");
380 printf("- no sectors to erase\n");
384 type = (info->flash_id & FLASH_VENDMASK);
385 if ((type != FLASH_MAN_INTEL)) {
386 type = (info->flash_id & FLASH_VENDMASK);
387 printf("Can't erase unknown flash type %08lx - aborted\n",
393 for (sect = s_first; sect <= s_last; ++sect) {
394 if (info->protect[sect]) {
400 printf("- Warning: %d protected sectors will not be erased!\n",
405 start = get_timer(0);
408 /* Disable interrupts which might cause a timeout here */
409 flag = disable_interrupts();
411 /* Start erase on unprotected sectors */
412 for (sect = s_first; sect <= s_last; sect++) {
413 if (info->protect[sect] == 0) { /* not protected */
415 FPWV *addr = (FPWV *) (info->start[sect]);
418 printf("Erasing sector %2d ... ", sect);
420 /* arm simple, non interrupt dependent timer */
421 start = get_timer(0);
423 *addr = (FPW) INTEL_READID;
424 min = addr[INTEL_CFI_TERB];
425 min = 1 << min; /* ms */
426 min = (min / info->sector_count) * 1000;
428 /* start erase block */
429 *addr = (FPW) INTEL_CLEAR; /* clear status register */
430 *addr = (FPW) INTEL_ERASE; /* erase setup */
431 *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
433 while ((*addr & (FPW) INTEL_FINISHED) !=
434 (FPW) INTEL_FINISHED) {
436 if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
438 *addr = (FPW) INTEL_SUSERASE; /* suspend erase */
439 *addr = (FPW) INTEL_RESET; /* reset to read mode */
446 *addr = (FPW) INTEL_RESET; /* resest to read mode */
455 int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
457 if (info->flash_id == FLASH_UNKNOWN)
460 switch (info->flash_id & FLASH_VENDMASK) {
461 case FLASH_MAN_INTEL:
465 int i, l, rc, port_width;
467 /* get lower word aligned address */
472 * handle unaligned start bytes
474 if ((l = addr - wp) != 0) {
476 for (i = 0, cp = wp; i < l; ++i, ++cp) {
477 data = (data << 8) | (*(uchar *) cp);
480 for (; i < port_width && cnt > 0; ++i) {
481 data = (data << 8) | *src++;
486 for (; cnt == 0 && i < port_width; ++i, ++cp)
487 data = (data << 8) | (*(uchar *) cp);
489 if ((rc = write_data(info, wp, data)) != 0)
495 /* handle word aligned part */
497 data = *((FPW *) src);
500 write_data(info, (ulong) ((FPWV *) wp),
514 * handle unaligned tail bytes
517 for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
518 data = (data >> 8) | (*src++ << 8);
521 for (; i < 2; ++i, ++cp) {
522 data |= (*(uchar *) cp);
525 return write_data(info, (ulong) ((FPWV *) wp),
528 } /* case FLASH_MAN_INTEL */
535 /*-----------------------------------------------------------------------
536 * Write a word or halfword to Flash, returns:
539 * 2 - Flash not erased
541 int write_data(flash_info_t * info, ulong dest, FPW data)
543 FPWV *addr = (FPWV *) dest;
547 /* Check if Flash is (sufficiently) erased */
548 if ((*addr & data) != data) {
549 printf("not erased at %08lx (%lx)\n", (ulong) addr,
554 /* Disable interrupts which might cause a timeout here */
555 flag = (int)disable_interrupts();
557 *addr = (FPW) INTEL_CLEAR;
558 *addr = (FPW) INTEL_RESET;
560 *addr = (FPW) INTEL_WRSETUP; /* write setup */
563 /* arm simple, non interrupt dependent timer */
564 start = get_timer(0);
566 /* wait while polling the status register */
567 while ((*addr & (FPW) INTEL_OK) != (FPW) INTEL_OK) {
568 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
569 *addr = (FPW) INTEL_SUSERASE; /* suspend mode */
570 *addr = (FPW) INTEL_CLEAR; /* clear status */
571 *addr = (FPW) INTEL_RESET; /* reset */
576 *addr = (FPW) INTEL_CLEAR; /* clear status */
577 *addr = (FPW) INTEL_RESET; /* restore read mode */
582 #ifdef CFG_FLASH_PROTECTION
583 /*-----------------------------------------------------------------------
585 int flash_real_protect(flash_info_t * info, long sector, int prot)
587 int rcode = 0; /* assume success */
588 FPWV *addr; /* address of sector */
591 addr = (FPWV *) (info->start[sector]);
593 switch (info->flash_id & FLASH_TYPEMASK) {
594 case FLASH_28F160C3B:
595 case FLASH_28F160C3T:
596 case FLASH_28F320C3B:
597 case FLASH_28F320C3T:
598 case FLASH_28F640C3B:
599 case FLASH_28F640C3T:
600 *addr = (FPW) INTEL_RESET; /* make sure in read mode */
601 *addr = (FPW) INTEL_LOCKBIT; /* lock command setup */
604 *addr = (FPW) INTEL_PROTECT; /* lock sector */
606 *addr = (FPW) INTEL_CONFIRM; /* unlock sector */
608 /* now see if it really is locked/unlocked as requested */
609 *addr = (FPW) INTEL_READID;
611 /* read sector protection at sector address, (A7 .. A0) = 0x02.
612 * D0 = 1 for each device if protected.
613 * If at least one device is protected the sector is marked
614 * protected, but return failure. Mixed protected and
615 * unprotected devices within a sector should never happen.
617 value = addr[2] & (FPW) INTEL_PROTECT;
619 info->protect[sector] = 0;
620 else if (value == (FPW) INTEL_PROTECT)
621 info->protect[sector] = 1;
623 /* error, mixed protected and unprotected */
625 info->protect[sector] = 1;
627 if (info->protect[sector] != prot)
628 rcode = 1; /* failed to protect/unprotect as requested */
630 /* reload all protection bits from hardware for now */
631 flash_sync_real_protect(info);
635 /* no hardware protect that we support */
636 info->protect[sector] = prot;
642 #endif /* CFG_FLASH_PROTECTION */
643 #endif /* CFG_FLASH_CFI */