1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2015 Freescale Semiconductor, Inc.
8 struct board_specific_parameters {
10 u32 datarate_mhz_high;
19 * These tables contain all valid speeds we want to override with board
20 * specific parameters. datarate_mhz_high values need to be in ascending order
21 * for each n_ranks group.
24 static const struct board_specific_parameters udimm0[] = {
27 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
30 {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
31 {2, 1666, 0, 10, 9, 0x090A0B0E, 0x0F11110C,},
32 {2, 1900, 0, 12, 0xA, 0x0B0C0E11, 0x1214140F,},
33 {2, 2300, 0, 12, 0xB, 0x0C0D0F12, 0x14161610,},
38 static const struct board_specific_parameters udimm2[] = {
41 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
42 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
44 {2, 1350, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,},
45 {2, 1666, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,},
46 {2, 1900, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,},
47 {2, 2200, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,},
51 static const struct board_specific_parameters rdimm0[] = {
54 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
55 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
57 {2, 1666, 0, 8, 0x0F, 0x0D0C0A09, 0x0B0C0E08,},
58 {2, 1900, 0, 8, 0x10, 0x0F0D0B0A, 0x0B0E0F09,},
59 {2, 2200, 0, 8, 0x13, 0x120F0E0B, 0x0D10110B,},
63 static const struct board_specific_parameters *udimms[] = {
69 static const struct board_specific_parameters *rdimms[] = {
72 udimm2, /* DP-DDR doesn't support RDIMM */