3 The LS1043A Reference Design Board (RDB) is a high-performance computing,
4 evaluation, and development platform that supports the QorIQ LS1043A
5 LayerScape Architecture processor. The LS1043ARDB provides SW development
6 platform for the Freescale LS1043A processor series, with a complete
7 debugging environment. The LS1043A RDB is lead-free and RoHS-compliant.
11 The LS1043A integrated multicore processor combines four ARM Cortex-A53
12 processor cores with datapath acceleration optimized for L2/3 packet
13 processing, single pass security offload and robust traffic management
14 and quality of service.
16 The LS1043A SoC includes the following function and features:
17 - Four 64-bit ARM Cortex-A53 CPUs
18 - 1 MB unified L2 Cache
19 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
21 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
22 the following functions:
23 - Packet parsing, classification, and distribution (FMan)
24 - Queue management for scheduling, packet sequencing, and congestion
26 - Hardware buffer management for buffer allocation and de-allocation (BMan)
27 - Cryptography acceleration (SEC)
28 - Ethernet interfaces by FMan
29 - Up to 1 x XFI supporting 10G interface
31 - Up to 4 x SGMII supporting 1000Mbps
32 - Up to 2 x SGMII supporting 2500Mbps
33 - Up to 2 x RGMII supporting 1000Mbps
34 - High-speed peripheral interfaces
35 - Three PCIe 2.0 controllers, one supporting x4 operation
36 - One serial ATA (SATA 3.0) controllers
37 - Additional peripheral interfaces
38 - Three high-speed USB 3.0 controllers with integrated PHY
39 - Enhanced secure digital host controller (eSDXC/eMMC)
40 - Quad Serial Peripheral Interface (QSPI) Controller
41 - Serial peripheral interface (SPI) controller
42 - Four I2C controllers
44 - Integrated flash controller supporting NAND and NOR flash
45 - QorIQ platform's trust architecture 2.1
47 LS1043ARDB board Overview
48 -----------------------
49 - SERDES Connections, 4 lanes supporting:
50 - PCI Express 2.0 with two PCIe connectors supporting: miniPCIe card and
52 - QSGMII with x4 RJ45 connector
53 - XFI with x1 RJ45 connector
55 - 2GB 32bits DDR4 SDRAM. Support rates of up to 1600MT/s
57 - One 128MB NOR flash 16-bit data bus
58 - One 512 MB NAND flash with ECC support
61 - Two super speed USB 3.0 Type A ports
62 - SDHC: connects directly to a full SD/MMC slot
63 - DSPI: 16 MB high-speed flash Memory for boot code and storage (up to 108MHz)
66 - Two 4-pin serial ports at up to 115.2 Kbit/s
67 - Two DB9 D-Type connectors supporting one Serial port each
70 Memory map from core's view
71 ----------------------------
72 Start Address End Address Description Size
73 0x00_0000_0000 0x00_000F_FFFF Secure Boot ROM 1MB
74 0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB
75 0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB
76 0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB
77 0x00_2000_0000 0x00_20FF_FFFF DCSR 16MB
78 0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB
79 0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB
80 0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB
81 0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB