2 * Copyright 2010-2011 Freescale Semiconductor
3 * Author: Timur Tabi <timur@freescale.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
10 * This file provides support for the ngPIXIS, a board-specific FPGA used on
11 * some Freescale reference boards.
13 * A "switch" is black rectangular block on the motherboard. It contains
14 * eight "bits". The ngPIXIS has a set of memory-mapped registers (SWx) that
15 * shadow the actual physical switches. There is also another set of
16 * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be
17 * used to override the values of the bits in the physical switches.
19 * The following macros need to be defined:
21 * PIXIS_BASE - The virtual address of the base of the PIXIS register map
23 * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value
24 * is used in the PIXIS_SW() macro to determine which offset in
25 * the PIXIS register map corresponds to the physical switch that controls
28 * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use.
30 * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK.
32 * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to
33 * boot from the alternate bank.
42 static u8 __pixis_read(unsigned int reg)
44 void *p = (void *)PIXIS_BASE;
48 u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read")));
50 static void __pixis_write(unsigned int reg, u8 value)
52 void *p = (void *)PIXIS_BASE;
54 out_8(p + reg, value);
56 void pixis_write(unsigned int reg, u8 value)
57 __attribute__((weak, alias("__pixis_write")));
60 * Reset the board. This ignores the ENx registers.
62 void __pixis_reset(void)
68 void pixis_reset(void) __attribute__((weak, alias("__pixis_reset")));
71 * Reset the board. Like pixis_reset(), but it honors the ENx registers.
73 void __pixis_bank_reset(void)
80 void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset")));
83 * Set the boot bank to the power-on default bank
85 void __clear_altbank(void)
89 /* Tell the ngPIXIS to use this the bits in the physical switch for the
90 * boot bank value, instead of the SWx register. We need to be careful
91 * only to set the bits in SWx that correspond to the boot bank.
93 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
94 reg &= ~PIXIS_LBMAP_MASK;
95 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
97 void clear_altbank(void) __attribute__((weak, alias("__clear_altbank")));
100 * Set the boot bank to the alternate bank
102 void __set_altbank(void)
106 /* Program the alternate bank number into the SWx register.
108 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw);
109 reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK;
110 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg);
112 /* Tell the ngPIXIS to use this the bits in the SWx register for the
113 * boot bank value, instead of the physical switch. We need to be
114 * careful only to set the bits in SWx that correspond to the boot bank.
116 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
117 reg |= PIXIS_LBMAP_MASK;
118 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
120 void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
123 static void pixis_dump_regs(void)
127 printf("id=%02x\n", PIXIS_READ(id));
128 printf("arch=%02x\n", PIXIS_READ(arch));
129 printf("scver=%02x\n", PIXIS_READ(scver));
130 printf("csr=%02x\n", PIXIS_READ(csr));
131 printf("rst=%02x\n", PIXIS_READ(rst));
132 printf("aux=%02x\n", PIXIS_READ(aux));
133 printf("spd=%02x\n", PIXIS_READ(spd));
134 printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0));
135 printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1));
136 printf("addr=%02x\n", PIXIS_READ(addr));
137 printf("data=%02x\n", PIXIS_READ(data));
138 printf("led=%02x\n", PIXIS_READ(led));
139 printf("vctl=%02x\n", PIXIS_READ(vctl));
140 printf("vstat=%02x\n", PIXIS_READ(vstat));
141 printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0));
142 printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr));
143 printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg));
144 printf("gmdbg=%02x\n", PIXIS_READ(gmdbg));
145 printf("sclk=%02x%02x%02x\n",
146 PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
147 printf("dclk=%02x%02x%02x\n",
148 PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
149 printf("watch=%02x\n", PIXIS_READ(watch));
151 for (i = 0; i < 8; i++) {
152 printf("SW%u=%02x/%02x ", i + 1,
153 PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
159 void pixis_sysclk_set(unsigned long sysclk)
161 unsigned long freq_word;
162 u8 sclk0, sclk1, sclk2;
164 freq_word = ics307_sysclk_calculator(sysclk);
165 sclk2 = freq_word & 0xff;
166 sclk1 = (freq_word >> 8) & 0xff;
167 sclk0 = (freq_word >> 16) & 0xff;
169 /* set SYSCLK enable bit */
170 PIXIS_WRITE(vcfgen0, 0x01);
172 /* SYSCLK to required frequency */
173 PIXIS_WRITE(sclk[0], sclk0);
174 PIXIS_WRITE(sclk[1], sclk1);
175 PIXIS_WRITE(sclk[2], sclk2);
178 int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
181 unsigned long sysclk;
182 char *p_altbank = NULL;
186 char *unknown_param = NULL;
188 /* No args is a simple reset request.
193 for (i = 1; i < argc; i++) {
194 if (strcmp(argv[i], "altbank") == 0) {
200 if (strcmp(argv[i], "dump") == 0) {
205 if (strcmp(argv[i], "sysclk") == 0) {
206 sysclk = simple_strtoul(argv[i + 1], NULL, 0);
208 pixis_sysclk_set(sysclk);
212 unknown_param = argv[i];
216 printf("Invalid option: %s\n", unknown_param);
224 /* 'dump' ignores other commands */
236 /* Shouldn't be reached. */
241 pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
242 "Reset the board using the FPGA sequencer",
243 "- hard reset to default bank\n"
244 "pixis_reset altbank - reset to alternate bank\n"
246 "pixis_reset dump - display the PIXIS registers\n"
248 "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n"