2 * Copyright 2007 Freescale Semiconductor, Inc.
3 * York Sun <yorksun@freescale.com>
5 * FSL DIU Framebuffer driver
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include "fsl_diu_fb.h"
33 #define DPRINTF(fmt, args...) printf("%s: " fmt,__FUNCTION__,## args)
35 #define DPRINTF(fmt, args...)
39 const char *name; /* optional */
40 unsigned int refresh; /* optional */
43 unsigned int pixclock;
44 unsigned int left_margin;
45 unsigned int right_margin;
46 unsigned int upper_margin;
47 unsigned int lower_margin;
48 unsigned int hsync_len;
49 unsigned int vsync_len;
55 #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
56 #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
57 #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
60 * These parameters give default parameters
61 * for video output 1024x768,
62 * FIXME - change timing to proper amounts
63 * hsync 31.5kHz, vsync 60Hz
65 static struct fb_videomode fsl_diu_mode_1024 = {
76 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
77 .vmode = FB_VMODE_NONINTERLACED
80 static struct fb_videomode fsl_diu_mode_1280 = {
81 .name = "1280x1024-60",
92 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
93 .vmode = FB_VMODE_NONINTERLACED
97 * These are the fields of area descriptor(in DDR memory) for every plane
100 /* Word 0(32-bit) in DDR memory */
101 unsigned int pix_fmt; /* hard coding pixel format */
102 /* Word 1(32-bit) in DDR memory */
104 /* Word 2(32-bit) in DDR memory */
105 unsigned int src_size_g_alpha;
106 /* Word 3(32-bit) in DDR memory */
107 unsigned int aoi_size;
108 /* Word 4(32-bit) in DDR memory */
109 unsigned int offset_xyi;
110 /* Word 5(32-bit) in DDR memory */
111 unsigned int offset_xyd;
112 /* Word 6(32-bit) in DDR memory */
113 unsigned int ckmax_r:8;
114 unsigned int ckmax_g:8;
115 unsigned int ckmax_b:8;
117 /* Word 7(32-bit) in DDR memory */
118 unsigned int ckmin_r:8;
119 unsigned int ckmin_g:8;
120 unsigned int ckmin_b:8;
121 unsigned int res10:8;
122 /* Word 8(32-bit) in DDR memory */
123 unsigned int next_ad;
124 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
128 }__attribute__ ((packed));
134 unsigned int desc[3];
136 unsigned int pallete;
138 unsigned int curs_pos;
139 unsigned int diu_mode;
141 unsigned int bgnd_wb;
142 unsigned int disp_size;
143 unsigned int wb_size;
144 unsigned int wb_mem_addr;
145 unsigned int hsyn_para;
146 unsigned int vsyn_para;
147 unsigned int syn_pol;
148 unsigned int thresholds;
149 unsigned int int_status;
150 unsigned int int_mask;
151 unsigned int colorbar[8];
152 unsigned int filling;
154 } __attribute__ ((packed));
158 volatile unsigned int mode; /* DIU operation mode */
162 unsigned char * paddr; /* Virtual address */
167 * Modes of operation of DIU
169 #define MFB_MODE0 0 /* DIU off */
170 #define MFB_MODE1 1 /* All three planes output to display */
171 #define MFB_MODE2 2 /* Plane 1 to display,
172 * planes 2+3 written back to memory */
173 #define MFB_MODE3 3 /* All three planes written back to memory */
174 #define MFB_MODE4 4 /* Color bar generation */
178 static struct fb_info fsl_fb_info;
179 static struct diu_addr gamma, cursor;
180 static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
181 static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
182 static unsigned char *dummy_fb;
183 static struct diu_hw dr = {
188 int fb_initialized = 0;
189 const int default_xres = 1280;
190 const int default_pixel_format = 0x88882317;
192 static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
193 static void enable_lcdc(void);
194 static void disable_lcdc(void);
195 static int fsl_diu_enable_panel(struct fb_info *info);
196 static int fsl_diu_disable_panel(struct fb_info *info);
197 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
198 void diu_set_pixel_clock(unsigned int pixclock);
200 int fsl_diu_init(int xres,
201 unsigned int pixel_format,
203 unsigned char *splash_bmp)
205 struct fb_videomode *fsl_diu_mode_db;
206 struct diu_ad *ad = &fsl_diu_fb_ad;
208 struct fb_info *info = &fsl_fb_info;
209 struct fb_var_screeninfo *var = &info->var;
210 unsigned char *gamma_table_base;
213 DPRINTF("Enter fsl_diu_init\n");
214 dr.diu_reg = (struct diu *) (CFG_DIU_ADDR);
215 hw = (struct diu *) dr.diu_reg;
220 fsl_diu_mode_db = &fsl_diu_mode_1280;
222 fsl_diu_mode_db = &fsl_diu_mode_1024;
225 if (0 == fb_initialized) {
226 allocate_buf(&gamma, 768, 32);
227 DPRINTF("gamma is allocated @ 0x%x\n",
228 (unsigned int)gamma.paddr);
229 allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
230 DPRINTF("curosr is allocated @ 0x%x\n",
231 (unsigned int)cursor.paddr);
233 /* create a dummy fb and dummy ad */
234 dummy_fb = malloc(64);
235 if (NULL == dummy_fb) {
236 printf("Cannot allocate dummy fb\n");
239 dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
240 dummy_ad.pix_fmt = 0x88882317;
241 dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
242 dummy_ad.aoi_size = 0x02000400;
243 dummy_ad.offset_xyi = 0;
244 dummy_ad.offset_xyd = 0;
245 dummy_ad.next_ad = 0;
246 /* Memory allocation for framebuffer */
247 if (map_video_memory(info, 32)) {
248 printf("Unable to allocate fb memory 1\n");
252 memset(info->screen_base, 0, info->smem_len);
255 dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
256 dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
257 dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
258 DPRINTF("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
259 DPRINTF("dummy desc[0] = 0x%x\n", hw->desc[0]);
262 var->xres = fsl_diu_mode_db->xres;
263 var->yres = fsl_diu_mode_db->yres;
264 var->bits_per_pixel = 32;
265 var->pixclock = fsl_diu_mode_db->pixclock;
266 var->left_margin = fsl_diu_mode_db->left_margin;
267 var->right_margin = fsl_diu_mode_db->right_margin;
268 var->upper_margin = fsl_diu_mode_db->upper_margin;
269 var->lower_margin = fsl_diu_mode_db->lower_margin;
270 var->hsync_len = fsl_diu_mode_db->hsync_len;
271 var->vsync_len = fsl_diu_mode_db->vsync_len;
272 var->sync = fsl_diu_mode_db->sync;
273 var->vmode = fsl_diu_mode_db->vmode;
274 info->line_length = var->xres * var->bits_per_pixel / 8;
276 info->logo_height = 0;
278 ad->pix_fmt = pixel_format;
279 ad->addr = cpu_to_le32((unsigned int)info->screen_base);
281 = cpu_to_le32((var->yres << 12) | var->xres);
282 /* fix me. AOI should not be greater than display size */
283 ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
287 /* Disable chroma keying function */
296 gamma_table_base = gamma.paddr;
297 DPRINTF("gamma_table_base is allocated @ 0x%x\n",
298 (unsigned int)gamma_table_base);
300 /* Prep for DIU init - gamma table */
302 for (i = 0; i <= 2; i++)
303 for (j = 0; j <= 255; j++)
304 *gamma_table_base++ = j;
306 if (gamma_fix == 1) { /* fix the gamma */
307 DPRINTF("Fix gamma table\n");
308 gamma_table_base = gamma.paddr;
309 for (i = 0; i < 256*3; i++) {
310 gamma_table_base[i] = (gamma_table_base[i] << 2)
311 | ((gamma_table_base[i] >> 6) & 0x03);
315 DPRINTF("update-lcdc: HW - %p\n Disabling DIU\n", hw);
317 /* Program DIU registers */
319 hw->gamma = (unsigned int) gamma.paddr;
320 hw->cursor= (unsigned int) cursor.paddr;
321 hw->bgnd = 0x007F7F7F; /* BGND */
322 hw->bgnd_wb = 0; /* BGND_WB */
323 hw->disp_size = var->yres << 16 | var->xres; /* DISP SIZE */
324 hw->wb_size = 0; /* WB SIZE */
325 hw->wb_mem_addr = 0; /* WB MEM ADDR */
326 hw->hsyn_para = var->left_margin << 22 | /* BP_H */
327 var->hsync_len << 11 | /* PW_H */
328 var->right_margin; /* FP_H */
329 hw->vsyn_para = var->upper_margin << 22 | /* BP_V */
330 var->vsync_len << 11 | /* PW_V */
331 var->lower_margin; /* FP_V */
333 hw->syn_pol = 0; /* SYNC SIGNALS POLARITY */
334 hw->thresholds = 0x00037800; /* The Thresholds */
335 hw->int_status = 0; /* INTERRUPT STATUS */
336 hw->int_mask = 0; /* INT MASK */
337 hw->plut = 0x01F5F666;
339 /* Pixel Clock configuration */
340 DPRINTF("DIU pixclock in ps - %d\n", var->pixclock);
341 diu_set_pixel_clock(var->pixclock);
346 info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
347 info->logo_size = info->logo_height * info->line_length;
348 DPRINTF("logo height %d, logo_size 0x%x\n",
349 info->logo_height,info->logo_size);
353 fsl_diu_enable_panel(info);
359 char *fsl_fb_open(struct fb_info **info)
361 *info = &fsl_fb_info;
362 return (char *) ((unsigned int)(*info)->screen_base
363 + (*info)->logo_size);
366 void fsl_diu_close(void)
368 struct fb_info *info = &fsl_fb_info;
369 fsl_diu_disable_panel(info);
372 static int fsl_diu_enable_panel(struct fb_info *info)
374 struct diu *hw = dr.diu_reg;
375 struct diu_ad *ad = &fsl_diu_fb_ad;
377 DPRINTF("Entered: enable_panel\n");
378 if (hw->desc[0] != (unsigned int)ad)
379 hw->desc[0] = (unsigned int)ad;
380 DPRINTF("desc[0] = 0x%x\n", hw->desc[0]);
384 static int fsl_diu_disable_panel(struct fb_info *info)
386 struct diu *hw = dr.diu_reg;
388 DPRINTF("Entered: disable_panel\n");
389 if (hw->desc[0] != (unsigned int)&dummy_ad)
390 hw->desc[0] = (unsigned int)&dummy_ad;
394 static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
396 unsigned long offset;
399 DPRINTF("Entered: map_video_memory\n");
400 /* allocate maximum 1280*1024 with 32bpp */
401 info->smem_len = 1280 * 4 *1024 + bytes_align;
402 DPRINTF("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
403 info->screen_base = malloc(info->smem_len);
404 if (info->screen_base == NULL) {
405 printf("Unable to allocate fb memory\n");
408 info->smem_start = (unsigned int) info->screen_base;
409 mask = bytes_align - 1;
410 offset = (unsigned long)info->screen_base & mask;
412 info->screen_base += offset;
413 info->smem_len = info->smem_len - (bytes_align - offset);
415 info->smem_len = info->smem_len - bytes_align;
417 info->screen_size = info->smem_len;
419 DPRINTF("Allocated fb @ 0x%08lx, size=%d.\n",
420 info->smem_start, info->smem_len);
425 static void enable_lcdc(void)
427 struct diu *hw = dr.diu_reg;
429 DPRINTF("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
431 hw->diu_mode = dr.mode;
434 DPRINTF("diu_mode = %d\n", hw->diu_mode);
437 static void disable_lcdc(void)
439 struct diu *hw = dr.diu_reg;
441 DPRINTF("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
449 * Align to 64-bit(8-byte), 32-byte, etc.
451 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
456 DPRINTF("Entered: allocate_buf\n");
457 ssize = size + bytes_align;
458 buf->paddr = malloc(ssize);
462 memset(buf->paddr, 0, ssize);
463 mask = bytes_align - 1;
464 offset = (u32)buf->paddr & mask;
466 buf->offset = bytes_align - offset;
467 buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
473 int fsl_diu_display_bmp(unsigned char *bmp,
478 struct fb_info *info = &fsl_fb_info;
479 unsigned char r, g, b;
480 unsigned int *fb_t, val;
481 unsigned char *bitmap;
482 unsigned int palette[256];
483 int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
486 printf("Must supply a bitmap address\n");
490 raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24);
491 width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18];
492 height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22];
493 bpp = (bmp[29] << 8) | (bmp[28]);
494 ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24);
495 bitmap = bmp + raster;
496 cpp = info->var.bits_per_pixel / 8;
498 DPRINTF("bmp = 0x%08x\n", (unsigned int)bmp);
499 DPRINTF("bitmap = 0x%08x\n", (unsigned int)bitmap);
500 DPRINTF("width = %d\n", width);
501 DPRINTF("height = %d\n", height);
502 DPRINTF("bpp = %d\n", bpp);
503 DPRINTF("ncolors = %d\n", ncolors);
505 DPRINTF("xres = %d\n", info->var.xres);
506 DPRINTF("yres = %d\n", info->var.yres);
507 DPRINTF("Screen_base = 0x%x\n", (unsigned int)info->screen_base);
509 if (((width+xoffset) > info->var.xres) ||
510 ((height+yoffset) > info->var.yres)) {
511 printf("bitmap is out of range, image too large or too much offset\n");
515 for (i = 0, offset = 54; i < ncolors; i++, offset += 4)
516 palette[i] = (bmp[offset+2] << 16)
517 + (bmp[offset+1] << 8) + bmp[offset];
522 for (y = height - 1; y >= 0; y--) {
523 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
524 for (x = 0; x < width; x += 8) {
526 for (k = 0; k < 8; k++) {
534 for (i = (width / 2) % 4; i > 0; i--)
539 for (y = height - 1; y >= 0; y--) {
540 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
541 for (x = 0; x < width; x += 2) {
545 *fb_t++ = palette[r];
546 *fb_t++ = palette[g];
548 for (i = (width / 2) % 4; i > 0; i--)
553 for (y = height - 1; y >= 0; y--) {
554 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
555 for (x = 0; x < width; x++) {
556 *fb_t++ = palette[ *bitmap++ ];
558 for (i = (width / 2) % 4; i > 0; i--)
563 for (y = height - 1; y >= 0; y--) {
564 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
565 for (x = 0; x < width; x++) {
569 val = (r << 16) + (g << 8) + b;
572 for (; (x % 4) != 0; x++) /* 4-byte alignment */
581 void fsl_diu_clear_screen(void)
583 struct fb_info *info = &fsl_fb_info;
585 memset(info->screen_base, 0, info->smem_len);