2 * (C) Copyright 2001-2003
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/processor.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 int board_early_init_f (void)
19 * IRQ 0-15 405GP internally generated; active high; level sensitive
20 * IRQ 16 405GP internally generated; active low; level sensitive
22 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
23 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
24 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
25 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
26 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
27 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
28 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
30 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
31 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
32 mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
33 mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */
34 mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
35 mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
36 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
39 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
41 mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
44 * Reset CPLD via GPIO13 (CS4) pin
46 out_be32((void *)GPIO0_OR,
47 in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 13));
48 udelay(1000); /* wait 1ms */
49 out_be32((void *)GPIO0_OR,
50 in_be32((void *)GPIO0_OR) | (0x80000000 >> 13));
51 udelay(1000); /* wait 1ms */
56 int misc_init_r (void)
58 /* adjust flash start and offset */
59 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
60 gd->bd->bi_flashoffset = 0;
67 * Check Board Identity:
73 int i = getenv_f("serial#", str, sizeof(str));
74 unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
75 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
76 unsigned char id1, id2, rev;
81 puts ("### No HW ID - assuming DP405");
85 id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
86 id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
88 rev = in_8((void *)0xf0001000);
89 if (rev & 0x10) /* old DP405 compatibility */
90 rev = in_8((void *)0xf0000800);
97 puts(" (HW=DP405/CO");
103 printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
105 if ((rev & 0xc0) == 0xc0) {
107 in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");