board/engicam/common/board.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2016 Amarula Solutions B.V.
   4  * Copyright (C) 2016 Engicam S.r.l.
   5  * Author: Jagan Teki <jagan@amarulasolutions.com>
   6  */
   7
   8 #include <common.h>
   9 #include <command.h>
  10 #include <env.h>
  11 #include <hang.h>
  12 #include <init.h>
  13 #include <mmc.h>
  14 #include <asm/arch/clock.h>
  15 #include <asm/arch/imx-regs.h>
  16 #include <asm/arch/sys_proto.h>
  17 #include <watchdog.h>
  18
  19 #include "board.h"
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 #ifdef CONFIG_ENV_IS_IN_MMC
  24 static void mmc_late_init(void)
  25 {
  26         char cmd[32];
  27         char mmcblk[32];
  28         u32 dev_no = mmc_get_env_dev();
  29
  30         env_set_ulong("mmcdev", dev_no);
  31
  32         /* Set mmcblk env */
  33         sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
  34         env_set("mmcroot", mmcblk);
  35
  36         sprintf(cmd, "mmc dev %d", dev_no);
  37         run_command(cmd, 0);
  38 }
  39 #endif
  40
  41 enum engicam_boards {
  42         IMX6Q_ICORE,
  43         IMX6DL_ICORE,
  44         IMX6Q_ICORE_MIPI,
  45         IMX6DL_ICORE_MIPI,
  46         IMX6Q_ICORE_RQS,
  47         IMX6DL_ICORE_RQS,
  48         IMX6UL_GEAM,
  49         IMX6UL_ISIOT_EMMC,
  50         IMX6UL_ISIOT_NAND,
  51         ENGICAM_BOARDS,
  52 };
  53
  54 static const char * const board_fdt_file[ENGICAM_BOARDS] = {
  55         [IMX6Q_ICORE] = "imx6q-icore.dtb",
  56         [IMX6DL_ICORE] = "imx6dl-icore.dtb",
  57         [IMX6Q_ICORE_MIPI] = "imx6q-icore-mipi.dtb",
  58         [IMX6DL_ICORE_MIPI] = "imx6dl-icore-mipi.dtb",
  59         [IMX6Q_ICORE_RQS] = "imx6q-icore-rqs.dtb",
  60         [IMX6DL_ICORE_RQS] = "imx6dl-icore-rqs.dtb",
  61         [IMX6UL_GEAM] = "imx6ul-geam.dtb",
  62         [IMX6UL_ISIOT_EMMC] = "imx6ul-isiot-emmc.dtb",
  63         [IMX6UL_ISIOT_NAND] = "imx6ul-isiot-nand.dtb",
  64 };
  65
  66 static int setenv_fdt_file(int board_detected)
  67 {
  68         if (board_detected < 0 || board_detected >= ENGICAM_BOARDS)
  69                 return -EINVAL;
  70
  71         if (!board_fdt_file[board_detected])
  72                 return -ENODEV;
  73
  74         env_set("fdt_file", board_fdt_file[board_detected]);
  75         return 0;
  76 }
  77
  78 static enum engicam_boards engicam_board_detect(void)
  79 {
  80         const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE;
  81
  82         if (!strcmp(cmp_dtb, "imx6q-icore")) {
  83                 if (is_mx6dq())
  84                         return IMX6Q_ICORE;
  85                 else if (is_mx6dl() || is_mx6solo())
  86                         return IMX6DL_ICORE;
  87         } else if (!strcmp(cmp_dtb, "imx6q-icore-mipi")) {
  88                 if (is_mx6dq())
  89                         return IMX6Q_ICORE_MIPI;
  90                 else if (is_mx6dl() || is_mx6solo())
  91                         return IMX6DL_ICORE_MIPI;
  92         } else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) {
  93                 if (is_mx6dq())
  94                         return IMX6Q_ICORE_RQS;
  95                 else if (is_mx6dl() || is_mx6solo())
  96                         return IMX6DL_ICORE_RQS;
  97         } else if (!strcmp(cmp_dtb, "imx6ul-geam"))
  98                         return IMX6UL_GEAM;
  99         else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc"))
 100                         return IMX6UL_ISIOT_EMMC;
 101         else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand"))
 102                         return IMX6UL_ISIOT_NAND;
 103
 104         return -EINVAL;
 105 }
 106
 107 static int fixup_enet_clock(enum engicam_boards board_detected)
 108 {
 109         struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 110         int clk_internal = 0;
 111
 112         switch (board_detected) {
 113         case IMX6Q_ICORE_MIPI:
 114         case IMX6DL_ICORE_MIPI:
 115                 clk_internal = 1;
 116                 break;
 117         default:
 118                 break;
 119         }
 120
 121         /* set gpr1[21] to select anatop clock */
 122         debug("fixup_enet_clock %d\n", clk_internal);
 123         clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21);
 124
 125         if (!clk_internal) {
 126                 /* clock is external */
 127                 return 0;
 128         }
 129
 130         return enable_fec_anatop_clock(0, ENET_50MHZ);
 131 }
 132
 133 int board_late_init(void)
 134 {
 135         enum engicam_boards board_detected = IMX6Q_ICORE;
 136
 137         switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
 138                         IMX6_BMODE_SHIFT) {
 139         case IMX6_BMODE_SD:
 140         case IMX6_BMODE_ESD:
 141         case IMX6_BMODE_MMC:
 142         case IMX6_BMODE_EMMC:
 143 #ifdef CONFIG_ENV_IS_IN_MMC
 144                 mmc_late_init();
 145 #endif
 146                 env_set("modeboot", "mmcboot");
 147                 break;
 148         case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
 149                 env_set("modeboot", "nandboot");
 150                 break;
 151         default:
 152                 env_set("modeboot", "");
 153                 break;
 154         }
 155
 156         if (is_mx6ul())
 157                 env_set("console", "ttymxc0");
 158         else
 159                 env_set("console", "ttymxc3");
 160
 161         board_detected = engicam_board_detect();
 162         if (board_detected < 0)
 163                 hang();
 164
 165         fixup_enet_clock(board_detected);
 166         setenv_fdt_file(board_detected);
 167
 168 #ifdef CONFIG_HW_WATCHDOG
 169         hw_watchdog_init();
 170 #endif
 171
 172         return 0;
 173 }
 174
 175 int board_init(void)
 176 {
 177         /* Address of boot parameters */
 178         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 179
 180 #ifdef CONFIG_NAND_MXS
 181         setup_gpmi_nand();
 182 #endif
 183
 184 #ifdef CONFIG_VIDEO_IPUV3
 185         setup_display();
 186 #endif
 187
 188         return 0;
 189 }
 190
 191 int dram_init(void)
 192 {
 193         gd->ram_size = imx_ddr_size();
 194
 195         return 0;
 196 }