1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Amarula Solutions B.V.
4 * Copyright (C) 2016 Engicam S.r.l.
5 * Author: Jagan Teki <jagan@amarulasolutions.com>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/sys_proto.h>
20 DECLARE_GLOBAL_DATA_PTR;
22 #ifdef CONFIG_ENV_IS_IN_MMC
23 static void mmc_late_init(void)
27 u32 dev_no = mmc_get_env_dev();
29 env_set_ulong("mmcdev", dev_no);
32 sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
33 env_set("mmcroot", mmcblk);
35 sprintf(cmd, "mmc dev %d", dev_no);
53 static const char * const board_fdt_file[ENGICAM_BOARDS] = {
54 [IMX6Q_ICORE] = "imx6q-icore.dtb",
55 [IMX6DL_ICORE] = "imx6dl-icore.dtb",
56 [IMX6Q_ICORE_MIPI] = "imx6q-icore-mipi.dtb",
57 [IMX6DL_ICORE_MIPI] = "imx6dl-icore-mipi.dtb",
58 [IMX6Q_ICORE_RQS] = "imx6q-icore-rqs.dtb",
59 [IMX6DL_ICORE_RQS] = "imx6dl-icore-rqs.dtb",
60 [IMX6UL_GEAM] = "imx6ul-geam.dtb",
61 [IMX6UL_ISIOT_EMMC] = "imx6ul-isiot-emmc.dtb",
62 [IMX6UL_ISIOT_NAND] = "imx6ul-isiot-nand.dtb",
65 static int setenv_fdt_file(int board_detected)
67 if (board_detected < 0 || board_detected >= ENGICAM_BOARDS)
70 if (!board_fdt_file[board_detected])
73 env_set("fdt_file", board_fdt_file[board_detected]);
77 static enum engicam_boards engicam_board_detect(void)
79 const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE;
81 if (!strcmp(cmp_dtb, "imx6q-icore")) {
84 else if (is_mx6dl() || is_mx6solo())
86 } else if (!strcmp(cmp_dtb, "imx6q-icore-mipi")) {
88 return IMX6Q_ICORE_MIPI;
89 else if (is_mx6dl() || is_mx6solo())
90 return IMX6DL_ICORE_MIPI;
91 } else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) {
93 return IMX6Q_ICORE_RQS;
94 else if (is_mx6dl() || is_mx6solo())
95 return IMX6DL_ICORE_RQS;
96 } else if (!strcmp(cmp_dtb, "imx6ul-geam"))
98 else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc"))
99 return IMX6UL_ISIOT_EMMC;
100 else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand"))
101 return IMX6UL_ISIOT_NAND;
106 static int fixup_enet_clock(enum engicam_boards board_detected)
108 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
109 int clk_internal = 0;
111 switch (board_detected) {
112 case IMX6Q_ICORE_MIPI:
113 case IMX6DL_ICORE_MIPI:
120 /* set gpr1[21] to select anatop clock */
121 debug("fixup_enet_clock %d\n", clk_internal);
122 clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21);
125 /* clock is external */
129 return enable_fec_anatop_clock(0, ENET_50MHZ);
132 int board_late_init(void)
134 enum engicam_boards board_detected = IMX6Q_ICORE;
136 switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
141 case IMX6_BMODE_EMMC:
142 #ifdef CONFIG_ENV_IS_IN_MMC
145 env_set("modeboot", "mmcboot");
147 case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
148 env_set("modeboot", "nandboot");
151 env_set("modeboot", "");
156 env_set("console", "ttymxc0");
158 env_set("console", "ttymxc3");
160 board_detected = engicam_board_detect();
161 if (board_detected < 0)
164 fixup_enet_clock(board_detected);
165 setenv_fdt_file(board_detected);
167 #ifdef CONFIG_HW_WATCHDOG
176 /* Address of boot parameters */
177 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
179 #ifdef CONFIG_NAND_MXS
183 #ifdef CONFIG_VIDEO_IPUV3
192 gd->ram_size = imx_ddr_size();