2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
7 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 #include <atmel_mci.h>
36 #include <asm/arch/hardware.h>
37 #include <asm/arch/at91sam9260_matrix.h>
38 #include <asm/arch/at91sam9_smc.h>
39 #include <asm/arch/at91_common.h>
40 #include <asm/arch/at91_pmc.h>
41 #include <asm/arch/at91_rstc.h>
42 #include <asm/arch/at91_shdwn.h>
43 #include <asm/arch/gpio.h>
45 DECLARE_GLOBAL_DATA_PTR;
47 #ifdef CONFIG_CMD_NAND
48 static void nand_hw_init(void)
50 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
51 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
54 /* Assign CS3 to NAND/SmartMedia Interface */
55 csa = readl(&matrix->ebicsa);
56 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
57 writel(csa, &matrix->ebicsa);
59 /* Configure SMC CS3 for NAND/SmartMedia */
60 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
61 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
63 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
64 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
66 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
68 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
69 AT91_SMC_MODE_EXNW_DISABLE |
71 AT91_SMC_MODE_TDF_CYCLE(2),
74 /* Configure RDY/BSY */
75 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
77 /* Enable NandFlash */
78 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
83 static void macb_hw_init(void)
85 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
87 /* Enable EMAC clock */
88 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
90 /* Initialize EMAC=MACB hardware */
95 #ifdef CONFIG_GENERIC_ATMEL_MCI
96 /* this is a weak define that we are overriding */
97 int board_mmc_init(bd_t *bd)
99 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
101 /* Enable MCI clock */
102 writel(1 << ATMEL_ID_MCI, &pmc->pcer);
104 /* Initialize MCI hardware */
107 /* This calls the atmel_mmc_init in gen_atmel_mci.c */
108 return atmel_mci_init((void *)ATMEL_BASE_MCI);
111 /* this is a weak define that we are overriding */
112 int board_mmc_getcd(struct mmc *mmc)
114 return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
119 int board_early_init_f(void)
121 struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
122 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
125 * make sure the board can be powered on by
126 * any transition on WKUP
128 writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
131 /* Enable clocks for all PIOs */
132 writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
133 (1 << ATMEL_ID_PIOC),
136 /* set SCL0 and SDA0 to open drain */
137 at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
138 at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
139 at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
140 at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
141 at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
142 at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
144 /* set SCL1 and SDA1 to open drain */
145 at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
146 at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
147 at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
148 at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
149 at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
150 at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
156 /* arch number of TOP9000 Board */
157 gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
158 /* adress of boot parameters */
159 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
161 at91_seriald_hw_init();
162 #ifdef CONFIG_CMD_NAND
168 #ifdef CONFIG_ATMEL_SPI0
169 /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
170 at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
172 #ifdef CONFIG_ATMEL_SPI1
173 at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
178 #ifdef CONFIG_MISC_INIT_R
179 int misc_init_r(void)
181 /* read 'factory' part of EEPROM */
189 gd->ram_size = get_ram_size(
190 (void *)CONFIG_SYS_SDRAM_BASE,
191 CONFIG_SYS_SDRAM_SIZE);
195 #ifdef CONFIG_RESET_PHY_R
199 * Initialize ethernet HW addresses prior to starting Linux,
200 * needed for nfsroot.
201 * TODO: We need to investigate if that is really necessary.
207 int board_eth_init(bd_t *bis)
212 rc = macb_eth_initialize(0,
213 (void *)ATMEL_BASE_EMAC0,
218 #ifdef CONFIG_ENC28J60
219 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
220 ENC_SPI_CLOCK, SPI_MODE_0);
223 # ifdef CONFIG_ENC28J60_2
224 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
225 ENC_SPI_CLOCK, SPI_MODE_0);
228 # ifdef CONFIG_ENC28J60_3
229 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
230 ENC_SPI_CLOCK, SPI_MODE_0);
240 * I2C access functions
243 * We need to access Bus 0 before relocation to access the
244 * environment settings.
245 * However i2c_get_bus_num() cannot be called before
248 #ifdef CONFIG_SOFT_I2C
251 /* ports are now initialized in board_early_init_f() */
256 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
258 return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
260 return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
265 void iic_sda(int bit)
267 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
269 at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
272 at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
277 void iic_scl(int bit)
279 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
281 at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
284 at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);