2 * (C) Copyright 2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* ------------------------------------------------------------------------- */
33 puts ("Board: ELTEC PowerPC\n");
37 /* ------------------------------------------------------------------------- */
42 printf ("Test not implemented !\n");
46 /* ------------------------------------------------------------------------- */
48 static unsigned int mpc106_read_cfg_dword (unsigned int reg)
50 unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
52 out32r(MPC106_REG_ADDR, reg_addr);
54 return (in32r(MPC106_REG_DATA | (reg & 0x3)));
57 /* ------------------------------------------------------------------------- */
59 long int dram_size (int board_type)
62 * No actual initialisation to do - done when setting up
63 * PICRs MCCRs ME/SARs etc in asm_init.S.
66 register unsigned long i, msar1, mear1, memSize;
68 #if defined(CFG_MEMTEST)
69 register unsigned long reg;
71 printf("Testing DRAM\n");
73 /* write each mem addr with it's address */
74 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
77 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
85 * Since MPC107 memory controller chip has already been set to
86 * control all memory, just read and interpret its memory boundery register.
89 msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
90 mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
91 i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
95 if (i & 0x01) /* is bank enabled ? */
96 memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
102 return (memSize * 0x100000);
104 /* ------------------------------------------------------------------------- */
106 long int initdram(int board_type)
108 return dram_size(board_type);
111 /* ------------------------------------------------------------------------- */
114 * The BAB 911 can be reset by writing bit 0 of the Processor Initialization
115 * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
118 void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
120 out8(MPC107_EUMB_PI, 1);
123 /* ------------------------------------------------------------------------- */
125 #if defined(CONFIG_WATCHDOG)
128 * Since the 7xx CPUs don't have an internal watchdog, this function is
131 void watchdog_reset(void)
134 #endif /* CONFIG_WATCHDOG */
136 /* ------------------------------------------------------------------------- */
138 void after_reloc (ulong dest_addr)
140 DECLARE_GLOBAL_DATA_PTR;
143 * Jump to the main U-Boot board init code
145 board_init_r(gd, dest_addr);
148 /* ------------------------------------------------------------------------- */
150 #ifdef CONFIG_CONSOLE_EXTRA_INFO
151 extern GraphicDevice smi;
153 void video_get_info_str (int line_number, char *info)
155 /* init video info strings for graphic console */
159 sprintf (info," MPC7xx V%d.%d at %d / %d MHz",
160 (get_pvr() >> 8) & 0xFF,
166 sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
167 dram_size(0)/0x100000,
168 flash_init()/0x100000);
171 sprintf (info, " %s", smi.modeIdent);
175 /* no more info lines */