2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 * (C) Copyright 2001 ELTEC Elektronik AG
5 * Frank Gottschling <fgottschling@eltec.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /*---------------------------------------------------------------------------*/
36 * Get Bus clock frequency
38 ulong bab7xx_get_bus_freq (void)
41 * The GPIO Port 1 on BAB7xx reflects the bus speed.
43 volatile struct GPIO *gpio =
44 (struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
46 unsigned char data = gpio->dta1;
54 /*---------------------------------------------------------------------------*/
57 * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
59 ulong bab7xx_get_gclk_freq (void)
61 static const int pllratio_to_factor[] = {
62 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
66 return pllratio_to_factor[get_hid1 () >> 28] *
67 (bab7xx_get_bus_freq () / 10);
70 /*----------------------------------------------------------------------------*/
74 uint pvr = get_pvr ();
76 printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
77 printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
78 bab7xx_get_bus_freq () / 1000000);
83 /* ------------------------------------------------------------------------- */
87 #ifdef CFG_ADDRESS_MAP_A
88 puts ("Board: ELTEC BAB7xx PReP\n");
90 puts ("Board: ELTEC BAB7xx CHRP\n");
95 /* ------------------------------------------------------------------------- */
99 /* TODO: XXX XXX XXX */
100 printf ("2 MB ## Test not implemented yet ##\n");
104 /* ------------------------------------------------------------------------- */
107 static unsigned int mpc106_read_cfg_dword (unsigned int reg)
109 unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
111 out32r (MPC106_REG_ADDR, reg_addr);
113 return (in32r (MPC106_REG_DATA | (reg & 0x3)));
116 /* ------------------------------------------------------------------------- */
118 long int dram_size (int board_type)
120 /* No actual initialisation to do - done when setting up
121 * PICRs MCCRs ME/SARs etc in ram_init.S.
124 register unsigned long i, msar1, mear1, memSize;
126 #if defined(CFG_MEMTEST)
127 register unsigned long reg;
129 printf ("Testing DRAM\n");
131 /* write each mem addr with it's address */
132 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
135 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
142 * Since MPC106 memory controller chip has already been set to
143 * control all memory, just read and interpret its memory boundery register.
146 msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
147 mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
148 i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
151 if (i & 0x01) /* is bank enabled ? */
152 memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
158 return (memSize * 0x100000);
161 /* ------------------------------------------------------------------------- */
163 long int initdram (int board_type)
165 return dram_size (board_type);
168 /* ------------------------------------------------------------------------- */
170 void after_reloc (ulong dest_addr)
172 DECLARE_GLOBAL_DATA_PTR;
175 * Jump to the main U-Boot board init code
177 board_init_r ((gd_t *) gd, dest_addr);
180 /* ------------------------------------------------------------------------- */
183 * do_reset is done here because in this case it is board specific, since the
184 * 7xx CPUs can only be reset by external HW (the RTC in this case).
186 void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
188 #if defined(CONFIG_RTC_MK48T59)
189 /* trigger watchdog immediately */
190 rtc_set_watchdog (1, RTC_WD_RB_16TH);
192 #error "You must define the macro CONFIG_RTC_MK48T59."
196 /* ------------------------------------------------------------------------- */
198 #if defined(CONFIG_WATCHDOG)
200 * Since the 7xx CPUs don't have an internal watchdog, this function is
201 * board specific. We use the RTC here.
203 void watchdog_reset (void)
205 #if defined(CONFIG_RTC_MK48T59)
206 /* we use a 32 sec watchdog timer */
207 rtc_set_watchdog (8, RTC_WD_RB_4);
209 #error "You must define the macro CONFIG_RTC_MK48T59."
212 #endif /* CONFIG_WATCHDOG */
214 /* ------------------------------------------------------------------------- */
216 #ifdef CONFIG_CONSOLE_EXTRA_INFO
217 extern GraphicDevice smi;
219 void video_get_info_str (int line_number, char *info)
221 /* init video info strings for graphic console */
222 switch (line_number) {
224 sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
225 (get_pvr () >> 8) & 0xFF,
227 bab7xx_get_gclk_freq () / 1000000,
228 bab7xx_get_bus_freq () / 1000000);
232 " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
233 dram_size (0) / 0x100000, flash_init () / 0x100000);
236 sprintf (info, " %s", smi.modeIdent);
240 /* no more info lines */
246 /*---------------------------------------------------------------------------*/