4 * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
6 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
8 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/sys_proto.h>
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/mux.h>
19 static struct module_pin_mux uart0_pin_mux[] = {
20 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
21 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
25 static struct module_pin_mux uart1_pin_mux[] = {
26 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
27 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
31 static struct module_pin_mux uart2_pin_mux[] = {
32 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
33 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
37 static struct module_pin_mux uart3_pin_mux[] = {
38 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
39 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
43 static struct module_pin_mux uart4_pin_mux[] = {
44 {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
45 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
49 static struct module_pin_mux uart5_pin_mux[] = {
50 {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
51 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
55 static struct module_pin_mux i2c0_pin_mux[] = {
56 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
57 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
58 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
59 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
63 void enable_uart0_pin_mux(void)
65 configure_module_pin_mux(uart0_pin_mux);
68 void enable_uart1_pin_mux(void)
70 configure_module_pin_mux(uart1_pin_mux);
73 void enable_uart2_pin_mux(void)
75 configure_module_pin_mux(uart2_pin_mux);
78 void enable_uart3_pin_mux(void)
80 configure_module_pin_mux(uart3_pin_mux);
83 void enable_uart4_pin_mux(void)
85 configure_module_pin_mux(uart4_pin_mux);
88 void enable_uart5_pin_mux(void)
90 configure_module_pin_mux(uart5_pin_mux);
93 void enable_uart_pin_mux(u32 addr)
96 case CONFIG_SYS_NS16550_COM1:
97 enable_uart0_pin_mux();
99 case CONFIG_SYS_NS16550_COM2:
100 enable_uart1_pin_mux();
102 case CONFIG_SYS_NS16550_COM3:
103 enable_uart2_pin_mux();
105 case CONFIG_SYS_NS16550_COM4:
106 enable_uart3_pin_mux();
108 case CONFIG_SYS_NS16550_COM5:
109 enable_uart4_pin_mux();
111 case CONFIG_SYS_NS16550_COM6:
112 enable_uart5_pin_mux();
117 void enable_i2c0_pin_mux(void)
119 configure_module_pin_mux(i2c0_pin_mux);