1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
8 #include <asm/arch/stm32.h>
9 #include <asm/arch/sys_proto.h>
16 #include <dm/device.h>
17 #include <dm/uclass.h>
19 #include <env_internal.h>
21 #include <generic-phy.h>
24 #include <i2c_eeprom.h>
33 #include <power/regulator.h>
34 #include <remoteproc.h>
38 #include <usb/dwc2_udc.h>
41 /* SYSCFG registers */
42 #define SYSCFG_BOOTR 0x00
43 #define SYSCFG_PMCSETR 0x04
44 #define SYSCFG_IOCTRLSETR 0x18
45 #define SYSCFG_ICNR 0x1C
46 #define SYSCFG_CMPCR 0x20
47 #define SYSCFG_CMPENSETR 0x24
48 #define SYSCFG_PMCCLRR 0x44
50 #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
51 #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
53 #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
54 #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
55 #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
56 #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
57 #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
59 #define SYSCFG_CMPCR_SW_CTRL BIT(1)
60 #define SYSCFG_CMPCR_READY BIT(8)
62 #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
64 #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
65 #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
67 #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
69 #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
70 #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
71 #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
72 #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
75 * Get a global data pointer
77 DECLARE_GLOBAL_DATA_PTR;
79 int setup_mac_address(void)
83 unsigned char enetaddr[6];
86 ret = eth_env_get_enetaddr("ethaddr", enetaddr);
87 if (ret) /* ethaddr is already set */
90 eeprom = ofnode_path("/soc/i2c@5c002000/eeprom@50");
91 if (!ofnode_valid(eeprom)) {
92 printf("Invalid hardware path to EEPROM!\n");
96 ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
98 printf("Cannot find EEPROM!\n");
102 ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
104 printf("Error reading configuration EEPROM!\n");
108 if (is_valid_ethaddr(enetaddr))
109 eth_env_set_enetaddr("ethaddr", enetaddr);
117 const char *fdt_compat;
120 if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
121 mode = "trusted with OP-TEE";
122 else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
127 printf("Board: stm32mp1 in %s mode", mode);
128 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
130 if (fdt_compat && fdt_compat_len)
131 printf(" (%s)", fdt_compat);
137 static void board_key_check(void)
139 #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
141 struct gpio_desc gpio;
142 enum forced_boot_mode boot_mode = BOOT_NORMAL;
144 node = ofnode_path("/config");
145 if (!ofnode_valid(node)) {
146 debug("%s: no /config node?\n", __func__);
149 #ifdef CONFIG_FASTBOOT
150 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
151 &gpio, GPIOD_IS_IN)) {
152 debug("%s: could not find a /config/st,fastboot-gpios\n",
155 if (dm_gpio_get_value(&gpio)) {
156 puts("Fastboot key pressed, ");
157 boot_mode = BOOT_FASTBOOT;
160 dm_gpio_free(NULL, &gpio);
163 #ifdef CONFIG_CMD_STM32PROG
164 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
165 &gpio, GPIOD_IS_IN)) {
166 debug("%s: could not find a /config/st,stm32prog-gpios\n",
169 if (dm_gpio_get_value(&gpio)) {
170 puts("STM32Programmer key pressed, ");
171 boot_mode = BOOT_STM32PROG;
173 dm_gpio_free(NULL, &gpio);
177 if (boot_mode != BOOT_NORMAL) {
178 puts("entering download mode...\n");
179 clrsetbits_le32(TAMP_BOOT_CONTEXT,
180 TAMP_BOOT_FORCED_MASK,
186 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
188 #include <usb/dwc2_udc.h>
189 int g_dnl_board_usb_cable_connected(void)
191 struct udevice *dwc2_udc_otg;
194 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
195 DM_GET_DRIVER(dwc2_udc_otg),
198 debug("dwc2_udc_otg init failed\n");
200 return dwc2_udc_B_session_valid(dwc2_udc_otg);
203 #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
204 #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
206 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
208 if (!strcmp(name, "usb_dnl_dfu"))
209 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
210 else if (!strcmp(name, "usb_dnl_fastboot"))
211 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
214 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
219 #endif /* CONFIG_USB_GADGET */
222 static int get_led(struct udevice **dev, char *led_string)
227 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
229 pr_debug("%s: could not find %s config string\n",
230 __func__, led_string);
233 ret = led_get_by_label(led_name, dev);
235 debug("%s: get=%d\n", __func__, ret);
242 static int setup_led(enum led_state_t cmd)
247 ret = get_led(&dev, "u-boot,boot-led");
251 ret = led_set_state(dev, cmd);
256 static void __maybe_unused led_error_blink(u32 nb_blink)
268 ret = get_led(&led, "u-boot,error-led");
270 /* make u-boot,error-led blinking */
271 /* if U32_MAX and 125ms interval, for 17.02 years */
272 for (i = 0; i < 2 * nb_blink; i++) {
273 led_set_state(led, LEDST_TOGGLE);
280 /* infinite: the boot process must be stopped */
281 if (nb_blink == U32_MAX)
285 static void sysconf_init(void)
287 #ifndef CONFIG_STM32MP1_TRUSTED
289 #ifdef CONFIG_DM_REGULATOR
290 struct udevice *pwr_dev;
291 struct udevice *pwr_reg;
298 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
300 /* interconnect update : select master using the port 1 */
303 /* today information is hardcoded in U-Boot */
304 writel(BIT(9), syscfg + SYSCFG_ICNR);
306 /* disable Pull-Down for boot pin connected to VDD */
307 bootr = readl(syscfg + SYSCFG_BOOTR);
308 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
309 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
310 writel(bootr, syscfg + SYSCFG_BOOTR);
312 #ifdef CONFIG_DM_REGULATOR
313 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
314 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
315 * The customer will have to disable this for low frequencies
316 * or if AFMUX is selected but the function not used, typically for
317 * TRACE. Otherwise, impact on power consumption.
320 * enabling High Speed mode while VDD>2.7V
321 * with the OTP product_below_2v5 (OTP 18, BIT 13)
322 * erroneously set to 1 can damage the IC!
323 * => U-Boot set the register only if VDD < 2.7V (in DT)
324 * but this value need to be consistent with board design
326 ret = uclass_get_device_by_driver(UCLASS_PMIC,
327 DM_GET_DRIVER(stm32mp_pwr_pmic),
330 ret = uclass_get_device_by_driver(UCLASS_MISC,
331 DM_GET_DRIVER(stm32mp_bsec),
334 pr_err("Can't find stm32mp_bsec driver\n");
338 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
342 /* get VDD = vdd-supply */
343 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
346 /* check if VDD is Low Voltage */
348 if (regulator_get_value(pwr_reg) < 2700000) {
349 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
350 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
351 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
352 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
353 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
354 syscfg + SYSCFG_IOCTRLSETR);
357 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
360 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
363 debug("VDD unknown");
368 /* activate automatic I/O compensation
369 * warning: need to ensure CSI enabled and ready in clock driver
371 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
373 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
375 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
379 /* board dependent setup after realloc */
384 /* address of boot parameters */
385 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
387 /* probe all PINCTRL for hog */
388 for (uclass_first_device(UCLASS_PINCTRL, &dev);
390 uclass_next_device(&dev)) {
391 pr_debug("probe pincontrol = %s\n", dev->name);
396 #ifdef CONFIG_DM_REGULATOR
397 regulators_enable_boot_on(_DEBUG);
402 if (CONFIG_IS_ENABLED(CONFIG_LED))
408 int board_late_init(void)
411 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
412 const void *fdt_compat;
415 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
417 if (fdt_compat && fdt_compat_len) {
418 if (strncmp(fdt_compat, "st,", 3) != 0)
419 env_set("board_name", fdt_compat);
421 env_set("board_name", fdt_compat + 3);
425 /* Check the boot-source to disable bootdelay */
426 boot_device = env_get("boot_device");
427 if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
428 env_set("bootdelay", "0");
433 void board_quiesce_devices(void)
436 setup_led(LEDST_OFF);
440 /* eth init function : weak called in eqos driver */
441 int board_interface_eth_init(struct udevice *dev,
442 phy_interface_t interface_type)
446 bool eth_clk_sel_reg = false;
447 bool eth_ref_clk_sel_reg = false;
449 /* Gigabit Ethernet 125MHz clock selection. */
450 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
452 /* Ethernet 50Mhz RMII clock selection */
453 eth_ref_clk_sel_reg =
454 dev_read_bool(dev, "st,eth_ref_clk_sel");
456 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
461 switch (interface_type) {
462 case PHY_INTERFACE_MODE_MII:
463 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
464 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
465 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
467 case PHY_INTERFACE_MODE_GMII:
469 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
470 SYSCFG_PMCSETR_ETH_CLK_SEL;
472 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
473 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
475 case PHY_INTERFACE_MODE_RMII:
476 if (eth_ref_clk_sel_reg)
477 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
478 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
480 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
481 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
483 case PHY_INTERFACE_MODE_RGMII:
484 case PHY_INTERFACE_MODE_RGMII_ID:
485 case PHY_INTERFACE_MODE_RGMII_RXID:
486 case PHY_INTERFACE_MODE_RGMII_TXID:
488 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
489 SYSCFG_PMCSETR_ETH_CLK_SEL;
491 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
492 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
495 debug("%s: Do not manage %d interface\n",
496 __func__, interface_type);
497 /* Do not manage others interfaces */
501 /* clear and set ETH configuration bits */
502 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
503 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
504 syscfg + SYSCFG_PMCCLRR);
505 writel(value, syscfg + SYSCFG_PMCSETR);
510 enum env_location env_get_location(enum env_operation op, int prio)
515 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
516 return ENVL_SPI_FLASH;
522 #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
524 #define MTDPARTS_LEN 256
525 #define MTDIDS_LEN 128
528 * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
529 * If we need to access it before the env is relocated, then we need
530 * to use our own stack buffer. gd->env_buf will be too small.
532 * @param buf temporary buffer pointer MTDPARTS_LEN long
533 * @return mtdparts variable string, NULL if not found
535 static const char *env_get_mtdparts(const char *str, char *buf)
537 if (gd->flags & GD_FLG_ENV_READY)
539 if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
546 * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
548 static void board_get_mtdparts(const char *dev,
552 char env_name[32] = "mtdparts_";
553 char tmp_mtdparts[MTDPARTS_LEN];
556 /* name of env variable to read = mtdparts_<dev> */
557 strcat(env_name, dev);
558 tmp = env_get_mtdparts(env_name, tmp_mtdparts);
560 /* mtdids: "<dev>=<dev>, ...." */
561 if (mtdids[0] != '\0')
567 /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
568 if (mtdparts[0] != '\0')
569 strncat(mtdparts, ";", MTDPARTS_LEN);
571 strcat(mtdparts, "mtdparts=");
572 strncat(mtdparts, dev, MTDPARTS_LEN);
573 strncat(mtdparts, ":", MTDPARTS_LEN);
574 strncat(mtdparts, tmp, MTDPARTS_LEN);
578 void board_mtdparts_default(const char **mtdids, const char **mtdparts)
581 static char parts[3 * MTDPARTS_LEN + 1];
582 static char ids[MTDIDS_LEN + 1];
583 static bool mtd_initialized;
585 if (mtd_initialized) {
591 memset(parts, 0, sizeof(parts));
592 memset(ids, 0, sizeof(ids));
594 /* probe all MTD devices */
595 for (uclass_first_device(UCLASS_MTD, &dev);
597 uclass_next_device(&dev)) {
598 pr_debug("mtd device = %s\n", dev->name);
601 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
602 board_get_mtdparts("nor0", ids, parts);
604 mtd_initialized = true;
607 debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
611 #if defined(CONFIG_OF_BOARD_SETUP)
612 int ft_board_setup(void *blob, bd_t *bd)
618 #ifdef CONFIG_SET_DFU_ALT_INFO
619 #define DFU_ALT_BUF_LEN SZ_1K
621 static void board_get_alt_info(const char *dev, char *buff)
623 char var_name[32] = "dfu_alt_info_";
626 ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
628 /* name of env variable to read = dfu_alt_info_<dev> */
629 strcat(var_name, dev);
630 ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
634 strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
638 void set_dfu_alt_info(char *interface, char *devstr)
642 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
644 if (env_get("dfu_alt_info"))
647 memset(buf, 0, sizeof(buf));
649 /* probe all MTD devices */
652 board_get_alt_info("ram", buf);
654 if (!uclass_get_device(UCLASS_MMC, 0, &dev))
655 board_get_alt_info("mmc0", buf);
657 if (!uclass_get_device(UCLASS_MMC, 1, &dev))
658 board_get_alt_info("mmc1", buf);
660 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
661 board_get_alt_info("nor0", buf);
663 env_set("dfu_alt_info", buf);
664 puts("DFU alt info setting: done\n");
668 static void board_copro_image_process(ulong fw_image, size_t fw_size)
670 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
672 if (!rproc_is_initialized())
674 printf("Remote Processor %d initialization failed\n",
679 ret = rproc_load(id, fw_image, fw_size);
680 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
681 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
685 env_set("copro_state", "booted");
689 U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);