2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
4 * Parts are shamelessly stolen from various TI sources, original copyright
6 * -----------------------------------------------------------------
8 * Copyright (C) 2004 Texas Instruments.
10 * ----------------------------------------------------------------------------
11 * SPDX-License-Identifier: GPL-2.0+
12 * ----------------------------------------------------------------------------
17 #include <asm/arch/nand_defs.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/arch/davinci_misc.h>
21 DECLARE_GLOBAL_DATA_PTR;
25 /* address of boot parameters */
26 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
28 /* Configure AEMIF pins (although this should be configured at boot time
29 * with pull-up/pull-down resistors) */
30 REG(PINMUX0) = 0x00000c1f;
32 davinci_errata_workarounds();
34 /* Power on required peripherals */
35 lpsc_on(DAVINCI_LPSC_GPIO);
37 #if !defined(CONFIG_SYS_USE_DSPLINK)
40 #endif /* CONFIG_SYS_USE_DSPLINK */
42 davinci_enable_uart0();
43 davinci_enable_emac();
46 lpsc_on(DAVINCI_LPSC_TIMER1);
54 uint8_t eeprom_enetaddr[6];
56 /* Read Ethernet MAC address from EEPROM if available. */
57 if (dvevm_read_mac_address(eeprom_enetaddr))
58 davinci_sync_env_enetaddr(eeprom_enetaddr);
63 #ifdef CONFIG_NAND_DAVINCI
65 /* Set WP on deselect, write enable on select */
66 static void nand_sonata_select_chip(struct mtd_info *mtd, int chip)
68 #define GPIO_SET_DATA01 0x01c67018
69 #define GPIO_CLR_DATA01 0x01c6701c
70 #define GPIO_NAND_WP (1 << 4)
71 #ifdef SONATA_BOARD_GPIOWP
73 REG(GPIO_CLR_DATA01) |= GPIO_NAND_WP;
75 REG(GPIO_SET_DATA01) |= GPIO_NAND_WP;
80 int board_nand_init(struct nand_chip *nand)
82 davinci_nand_init(nand);
83 nand->select_chip = nand_sonata_select_chip;
87 #endif /* CONFIG_NAND_DAVINCI */