2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
4 * Base on code from TI. Original Notices follow:
6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
8 * Modified for DA8xx EVM.
10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 * Parts are shamelessly stolen from various TI sources, original copyright
14 * -----------------------------------------------------------------
16 * Copyright (C) 2004 Texas Instruments.
18 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
39 #include <asm/arch/hardware.h>
40 #include <asm/arch/emif_defs.h>
41 #include <asm/arch/emac_defs.h>
44 #include <asm/arch/nand_defs.h>
45 #include <asm/arch/davinci_misc.h>
47 #ifdef CONFIG_DAVINCI_MMC
49 #include <asm/arch/sdmmc_defs.h>
52 DECLARE_GLOBAL_DATA_PTR;
54 /* SPI0 pin muxer settings */
55 static const struct pinmux_config spi0_pins[] = {
63 /* EMIF-A bus pins for 8-bit NAND support on CS3 */
64 static const struct pinmux_config emifa_nand_pins[] = {
80 /* EMAC PHY interface pins */
81 static const struct pinmux_config emac_pins[] = {
94 /* UART pin muxer settings */
95 static const struct pinmux_config uart_pins[] = {
100 /* I2C pin muxer settings */
101 static const struct pinmux_config i2c_pins[] = {
106 #ifdef CONFIG_USE_NAND
107 /* NAND pin muxer settings */
108 const struct pinmux_config aemif_pins[] = {
109 { pinmux(13), 1, 6 },
110 { pinmux(13), 1, 7 },
111 { pinmux(14), 1, 0 },
112 { pinmux(14), 1, 1 },
113 { pinmux(14), 1, 2 },
114 { pinmux(14), 1, 3 },
115 { pinmux(14), 1, 4 },
116 { pinmux(14), 1, 5 },
117 { pinmux(14), 1, 6 },
118 { pinmux(14), 1, 7 },
119 { pinmux(15), 1, 0 },
120 { pinmux(15), 1, 1 },
121 { pinmux(15), 1, 2 },
122 { pinmux(15), 1, 3 },
123 { pinmux(15), 1, 4 },
124 { pinmux(15), 1, 5 },
125 { pinmux(15), 1, 6 },
126 { pinmux(15), 1, 7 },
127 { pinmux(16), 1, 0 },
128 { pinmux(16), 1, 1 },
129 { pinmux(16), 1, 2 },
130 { pinmux(16), 1, 3 },
131 { pinmux(16), 1, 4 },
132 { pinmux(16), 1, 5 },
133 { pinmux(16), 1, 6 },
134 { pinmux(16), 1, 7 },
135 { pinmux(17), 1, 0 },
136 { pinmux(17), 1, 1 },
137 { pinmux(17), 1, 2 },
138 { pinmux(17), 1, 3 },
139 { pinmux(17), 1, 4 },
140 { pinmux(17), 1, 5 },
141 { pinmux(17), 1, 6 },
142 { pinmux(17), 1, 7 },
143 { pinmux(18), 1, 0 },
144 { pinmux(18), 1, 1 },
145 { pinmux(18), 1, 2 },
146 { pinmux(18), 1, 3 },
147 { pinmux(18), 1, 4 },
148 { pinmux(18), 1, 5 },
149 { pinmux(18), 1, 6 },
150 { pinmux(18), 1, 7 },
156 /* USB0_DRVVBUS pin muxer settings */
157 static const struct pinmux_config usb_pins[] = {
161 #ifdef CONFIG_DAVINCI_MMC
162 /* MMC0 pin muxer settings */
163 const struct pinmux_config mmc0_pins[] = {
164 { pinmux(15), 2, 7 }, /* MMCSD0_CLK */
165 { pinmux(16), 2, 0 }, /* MMCSD0_CMD */
166 { pinmux(13), 2, 6 }, /* MMCSD0_DAT_0 */
167 { pinmux(13), 2, 7 }, /* MMCSD0_DAT_1 */
168 { pinmux(14), 2, 0 }, /* MMCSD0_DAT_2 */
169 { pinmux(14), 2, 1 }, /* MMCSD0_DAT_3 */
170 { pinmux(14), 2, 2 }, /* MMCSD0_DAT_4 */
171 { pinmux(14), 2, 3 }, /* MMCSD0_DAT_5 */
172 { pinmux(14), 2, 4 }, /* MMCSD0_DAT_6 */
173 { pinmux(14), 2, 5 }, /* MMCSD0_DAT_7 */
174 /* DA830 supports 8-bit mode */
178 static const struct pinmux_resource pinmuxes[] = {
179 #ifdef CONFIG_SPI_FLASH
180 PINMUX_ITEM(spi0_pins),
182 PINMUX_ITEM(uart_pins),
183 PINMUX_ITEM(i2c_pins),
184 #ifdef CONFIG_USB_DA8XX
185 PINMUX_ITEM(usb_pins),
187 #ifdef CONFIG_USE_NAND
188 PINMUX_ITEM(emifa_nand_pins),
189 PINMUX_ITEM(aemif_pins),
191 #if defined(CONFIG_DRIVER_TI_EMAC)
192 PINMUX_ITEM(emac_pins),
194 #ifdef CONFIG_DAVINCI_MMC
195 PINMUX_ITEM(mmc0_pins),
199 static const struct lpsc_resource lpsc[] = {
200 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
201 { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
202 { DAVINCI_LPSC_EMAC }, /* image download */
203 { DAVINCI_LPSC_UART2 }, /* console */
204 { DAVINCI_LPSC_GPIO },
205 #ifdef CONFIG_DAVINCI_MMC
206 { DAVINCI_LPSC_MMC_SD },
211 #ifdef CONFIG_DAVINCI_MMC
212 static struct davinci_mmc mmc_sd0 = {
213 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
214 .host_caps = MMC_MODE_8BIT,
215 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
216 .version = MMC_CTLR_VERSION_2,
219 int board_mmc_init(bd_t *bis)
221 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
223 printf("%x\n", mmc_sd0.input_clk);
225 /* Add slot-0 to mmc subsystem */
226 return davinci_mmc_init(bis, &mmc_sd0);
232 #ifndef CONFIG_USE_IRQ
236 #ifdef CONFIG_NAND_DAVINCI
237 /* EMIFA 100MHz clock select */
238 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
239 &davinci_syscfg_regs->cfgchip3);
241 writel((DAVINCI_ABCR_WSETUP(0) |
242 DAVINCI_ABCR_WSTROBE(2) |
243 DAVINCI_ABCR_WHOLD(0) |
244 DAVINCI_ABCR_RSETUP(0) |
245 DAVINCI_ABCR_RSTROBE(2) |
246 DAVINCI_ABCR_RHOLD(0) |
248 DAVINCI_ABCR_ASIZE_8BIT),
249 &davinci_emif_regs->ab2cr);
252 /* arch number of the board */
253 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
255 /* address of boot parameters */
256 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
259 * Power on required peripherals
260 * ARM does not have access by default to PSC0 and PSC1
261 * assuming here that the DSP bootloader has set the IOPU
262 * such that PSC access is available to ARM
264 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
267 /* setup the SUSPSRC for ARM to control emulation suspend */
268 writel(readl(&davinci_syscfg_regs->suspsrc) &
269 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
270 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
271 DAVINCI_SYSCFG_SUSPSRC_UART2),
272 &davinci_syscfg_regs->suspsrc);
274 /* configure pinmux settings */
275 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
278 /* enable the console UART */
279 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
280 DAVINCI_UART_PWREMU_MGMT_UTRST),
281 &davinci_uart2_ctrl_regs->pwremu_mgmt);
287 #ifdef CONFIG_NAND_DAVINCI
288 int board_nand_init(struct nand_chip *nand)
290 davinci_nand_init(nand);
296 #if defined(CONFIG_DRIVER_TI_EMAC)
298 #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
301 * Initializes on-board ethernet controllers.
303 int board_eth_init(bd_t *bis)
305 u_int8_t mac_addr[6];
306 u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
307 struct eth_device *dev;
309 /* Read Ethernet MAC address from EEPROM */
310 if (dvevm_read_mac_address(mac_addr))
311 /* set address env if not already set */
312 davinci_sync_env_enetaddr(mac_addr);
314 /* read the address back from env */
315 if (!eth_getenv_enetaddr("ethaddr", mac_addr))
318 /* enable the Ethernet switch in the 3 port PHY */
319 if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
320 switch_start_cmd, sizeof(switch_start_cmd))) {
321 printf("Ethernet switch start failed!\n");
325 /* finally, initialise the driver */
326 if (!davinci_emac_initialize()) {
327 printf("Error: Ethernet init failed!\n");
333 /* provide the resulting addr to the driver */
334 memcpy(dev->enetaddr, mac_addr, 6);
335 dev->write_hwaddr(dev);
339 #endif /* CONFIG_DRIVER_TI_EMAC */