2 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <asm/arch/tegra20.h>
20 #include <asm/arch/pinmux.h>
21 #include <asm/arch/mmc.h>
23 #ifdef CONFIG_TEGRA_MMC
28 * Routine: gpio_config_uart
29 * Description: Does nothing on Paz00 - no conflict w/SPI.
31 void gpio_config_uart(void)
35 #ifdef CONFIG_TEGRA_MMC
37 * Routine: pin_mux_mmc
38 * Description: setup the pin muxes/tristate values for the SDMMC(s)
40 static void pin_mux_mmc(void)
42 /* SDMMC4: config 3, x8 on 2nd set of pins */
43 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
44 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
45 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
47 pinmux_tristate_disable(PINGRP_ATB);
48 pinmux_tristate_disable(PINGRP_GMA);
49 pinmux_tristate_disable(PINGRP_GME);
51 /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
52 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
54 pinmux_tristate_disable(PINGRP_SDIO1);
56 /* For power GPIO PV1 */
57 pinmux_tristate_disable(PINGRP_UAC);
59 pinmux_tristate_disable(PINGRP_GPV);
62 /* this is a weak define that we are overriding */
63 int board_mmc_init(bd_t *bd)
65 debug("board_mmc_init called\n");
67 /* Enable muxes, etc. for SDMMC controllers */
70 debug("board_mmc_init: init eMMC\n");
71 /* init dev 0, eMMC chip, with 4-bit bus */
72 /* The board has an 8-bit bus, but 8-bit doesn't work yet */
73 tegra20_mmc_init(0, 4, -1, -1);
75 debug("board_mmc_init: init SD slot\n");
76 /* init dev 3, SD slot, with 4-bit bus */
77 tegra20_mmc_init(3, 4, GPIO_PV1, GPIO_PV5);