1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
12 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
13 #define FLASH_BANK_SIZE 0x200000
15 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
17 void flash_print_info (flash_info_t * info)
21 switch (info->flash_id & FLASH_VENDMASK) {
22 case (AMD_MANUFACT & FLASH_VENDMASK):
26 printf ("Unknown Vendor ");
30 switch (info->flash_id & FLASH_TYPEMASK) {
31 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
32 printf ("AM29PL160CB (16Mbit)\n");
35 printf ("Unknown Chip Type\n");
40 printf (" Size: %ld MB in %d Sectors\n",
41 info->size >> 20, info->sector_count);
43 printf (" Sector Start Addresses:");
44 for (i = 0; i < info->sector_count; i++) {
48 printf (" %08lX%s", info->start[i],
49 info->protect[i] ? " (RO)" : " ");
58 unsigned long flash_init (void)
63 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
66 flash_info[i].flash_id =
67 (AMD_MANUFACT & FLASH_VENDMASK) |
68 (AMD_ID_PL160CB & FLASH_TYPEMASK);
69 flash_info[i].size = FLASH_BANK_SIZE;
70 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
71 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
73 flashbase = PHYS_FLASH_1;
75 panic ("configured to many flash banks!\n");
77 for (j = 0; j < flash_info[i].sector_count; j++) {
80 flash_info[i].start[j] = flashbase;
82 if ((j >= 1) && (j <= 2)) {
83 /* 2nd and 3rd are 8 KiB */
84 flash_info[i].start[j] =
85 flashbase + 0x4000 + 0x2000 * (j - 1);
89 flash_info[i].start[j] = flashbase + 0x8000;
91 if ((j >= 4) && (j <= 10)) {
93 flash_info[i].start[j] =
94 flashbase + 0x40000 + 0x40000 * (j -
98 size += flash_info[i].size;
101 flash_protect (FLAG_PROTECT_SET,
102 CONFIG_SYS_FLASH_BASE,
103 CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
109 #define CMD_READ_ARRAY 0x00F0
110 #define CMD_UNLOCK1 0x00AA
111 #define CMD_UNLOCK2 0x0055
112 #define CMD_ERASE_SETUP 0x0080
113 #define CMD_ERASE_CONFIRM 0x0030
114 #define CMD_PROGRAM 0x00A0
115 #define CMD_UNLOCK_BYPASS 0x0020
117 #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
118 #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
120 #define BIT_ERASE_DONE 0x0080
121 #define BIT_RDY_MASK 0x0080
122 #define BIT_PROGRAM_ERROR 0x0020
123 #define BIT_TIMEOUT 0x80000000 /* our flag */
130 int flash_erase (flash_info_t * info, int s_first, int s_last)
133 int iflag, cflag, prot, sect;
138 /* first look for protection bits */
140 if (info->flash_id == FLASH_UNKNOWN)
141 return ERR_UNKNOWN_FLASH_TYPE;
143 if ((s_first < 0) || (s_first > s_last)) {
147 if ((info->flash_id & FLASH_VENDMASK) !=
148 (AMD_MANUFACT & FLASH_VENDMASK)) {
149 return ERR_UNKNOWN_FLASH_VENDOR;
153 for (sect = s_first; sect <= s_last; ++sect) {
154 if (info->protect[sect]) {
159 return ERR_PROTECTED;
162 * Disable interrupts which might cause a timeout
163 * here. Remember that our exception vectors are
164 * at address 0 in the flash, and we don't want a
165 * (ticker) exception to happen while the flash
166 * chip is in programming mode.
169 cflag = icache_status();
171 iflag = disable_interrupts();
175 /* Start erase on unprotected sectors */
176 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
177 printf ("Erasing sector %2d ... ", sect);
179 /* arm simple, non interrupt dependent timer */
180 start = get_timer(0);
182 if (info->protect[sect] == 0) { /* not protected */
184 (volatile u16 *) (info->start[sect]);
186 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
187 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
188 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
190 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
191 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
192 *addr = CMD_ERASE_CONFIRM;
194 /* wait until flash is ready */
201 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
202 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
208 && (result & 0xFFFF) & BIT_ERASE_DONE)
213 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
225 } else { /* it was protected */
227 printf ("protected!\n");
232 printf ("User Interrupt!\n");
235 /* allow flash to settle - wait 10 ms */
247 static int write_word (flash_info_t * info, ulong dest, ulong data)
249 volatile u16 *addr = (volatile u16 *) dest;
257 * Check if Flash is (sufficiently) erased
260 if ((result & data) != data)
261 return ERR_NOT_ERASED;
265 * Disable interrupts which might cause a timeout
266 * here. Remember that our exception vectors are
267 * at address 0 in the flash, and we don't want a
268 * (ticker) exception to happen while the flash
269 * chip is in programming mode.
272 cflag = icache_status();
274 iflag = disable_interrupts();
276 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
277 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
278 MEM_FLASH_ADDR1 = CMD_PROGRAM;
281 /* arm simple, non interrupt dependent timer */
282 start = get_timer(0);
284 /* wait until flash is ready */
290 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
294 if (!chip1 && ((result & 0x80) == (data & 0x80)))
299 *addr = CMD_READ_ARRAY;
301 if (chip1 == ERR || *addr != data)
314 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
320 printf ("unaligned destination not supported\n");
326 printf ("odd transfer sizes not supported\n");
334 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
336 if ((rc = write_word (info, wp - 1, data)) != 0) {
345 data = *((volatile u16 *) src);
346 if ((rc = write_word (info, wp, data)) != 0) {
355 data = (*((volatile u8 *) src) << 8) |
356 *((volatile u8 *) (wp + 1));
357 if ((rc = write_word (info, wp, data)) != 0) {