1 // SPDX-License-Identifier: GPL-2.0+
6 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
9 * Board functions for TI AM335X based boards
11 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/omap.h>
25 #include <asm/arch/ddr_defs.h>
26 #include <asm/arch/clock.h>
27 #include <asm/arch/gpio.h>
28 #include <asm/arch/mmc_host_def.h>
29 #include <asm/arch/sys_proto.h>
30 #include <asm/arch/mem.h>
37 #include <power/tps65217.h>
38 #include <env_internal.h>
43 DECLARE_GLOBAL_DATA_PTR;
45 static struct shc_eeprom __attribute__((section(".data"))) header;
46 static int shc_eeprom_valid;
49 * Read header information from EEPROM into global structure.
51 static int read_eeprom(void)
53 /* Check if baseboard eeprom is available */
54 if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
55 puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
59 /* read the eeprom using i2c */
60 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
62 puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
66 if (header.magic != HDR_MAGIC) {
67 printf("Incorrect magic number (0x%x) in EEPROM\n",
77 static void shc_request_gpio(void)
79 gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
80 gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
81 gpio_request(RESET_GPIO, "reset");
82 gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
83 gpio_request(WIFI_RST_GPIO, "WIFI rst");
84 gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
85 gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
86 gpio_request(ENOC_RST_GPIO, "ENOC rst");
87 #if defined CONFIG_B_SAMPLE
88 gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
89 gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
90 gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
91 gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
93 gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
94 gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
95 gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
96 gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
97 gpio_request(LED_PWM_GPIO, "LED PWM");
98 gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
100 gpio_request(BACK_BUTTON_GPIO, "Back button");
101 gpio_request(FRONT_BUTTON_GPIO, "Front button");
105 * Function which forces all installed modules into running state for ICT
106 * testing. Called by SPL.
108 static void __maybe_unused force_modules_running(void)
110 /* Wi-Fi power regulator enable - high = enabled */
111 gpio_direction_output(WIFI_REGEN_GPIO, 1);
113 * Wait for Wi-Fi power regulator to reach a stable voltage
114 * (soft-start time, max. 350 µs)
118 /* Wi-Fi module reset - high = running */
119 gpio_direction_output(WIFI_RST_GPIO, 1);
121 /* ZigBee reset - high = running */
122 gpio_direction_output(ZIGBEE_RST_GPIO, 1);
124 /* BidCos reset - high = running */
125 gpio_direction_output(BIDCOS_RST_GPIO, 1);
127 #if !defined(CONFIG_B_SAMPLE)
128 /* Z-Wave reset - high = running */
129 gpio_direction_output(Z_WAVE_RST_GPIO, 1);
132 /* EnOcean reset - low = running */
133 gpio_direction_output(ENOC_RST_GPIO, 0);
137 * Function which forces all installed modules into reset - to be released by
138 * the OS, called by SPL
140 static void __maybe_unused force_modules_reset(void)
142 /* Wi-Fi module reset - low = reset */
143 gpio_direction_output(WIFI_RST_GPIO, 0);
145 /* Wi-Fi power regulator enable - low = disabled */
146 gpio_direction_output(WIFI_REGEN_GPIO, 0);
148 /* ZigBee reset - low = reset */
149 gpio_direction_output(ZIGBEE_RST_GPIO, 0);
151 /* BidCos reset - low = reset */
152 /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
154 #if !defined(CONFIG_B_SAMPLE)
155 /* Z-Wave reset - low = reset */
156 gpio_direction_output(Z_WAVE_RST_GPIO, 0);
159 /* EnOcean reset - high = reset*/
160 gpio_direction_output(ENOC_RST_GPIO, 1);
164 * Function to set the LEDs in the state "Bootloader booting"
166 static void __maybe_unused leds_set_booting(void)
168 #if defined(CONFIG_B_SAMPLE)
170 /* Turn all red LEDs on */
171 gpio_direction_output(LED_PWR_RD_GPIO, 1);
172 gpio_direction_output(LED_CONN_RD_GPIO, 1);
174 #else /* All other SHCs starting with B2-Sample */
175 /* Set the PWM GPIO */
176 gpio_direction_output(LED_PWM_GPIO, 1);
177 /* Turn all red LEDs on */
178 gpio_direction_output(LED_PWR_RD_GPIO, 1);
179 gpio_direction_output(LED_LAN_RD_GPIO, 1);
180 gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
186 * Function to set the LEDs in the state "Bootloader error"
188 static void leds_set_failure(int state)
190 #if defined(CONFIG_B_SAMPLE)
191 /* Turn all blue and green LEDs off */
192 gpio_set_value(LED_PWR_BL_GPIO, 0);
193 gpio_set_value(LED_PWR_GN_GPIO, 0);
194 gpio_set_value(LED_CONN_BL_GPIO, 0);
195 gpio_set_value(LED_CONN_GN_GPIO, 0);
197 /* Turn all red LEDs to 'state' */
198 gpio_set_value(LED_PWR_RD_GPIO, state);
199 gpio_set_value(LED_CONN_RD_GPIO, state);
201 #else /* All other SHCs starting with B2-Sample */
202 /* Set the PWM GPIO */
203 gpio_direction_output(LED_PWM_GPIO, 1);
205 /* Turn all blue LEDs off */
206 gpio_set_value(LED_PWR_BL_GPIO, 0);
207 gpio_set_value(LED_LAN_BL_GPIO, 0);
208 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
210 /* Turn all red LEDs to 'state' */
211 gpio_set_value(LED_PWR_RD_GPIO, state);
212 gpio_set_value(LED_LAN_RD_GPIO, state);
213 gpio_set_value(LED_CLOUD_RD_GPIO, state);
218 * Function to set the LEDs in the state "Bootloader finished"
220 static void leds_set_finish(void)
222 #if defined(CONFIG_B_SAMPLE)
223 /* Turn all LEDs off */
224 gpio_set_value(LED_PWR_BL_GPIO, 0);
225 gpio_set_value(LED_PWR_RD_GPIO, 0);
226 gpio_set_value(LED_PWR_GN_GPIO, 0);
227 gpio_set_value(LED_CONN_BL_GPIO, 0);
228 gpio_set_value(LED_CONN_RD_GPIO, 0);
229 gpio_set_value(LED_CONN_GN_GPIO, 0);
230 #else /* All other SHCs starting with B2-Sample */
231 /* Turn all LEDs off */
232 gpio_set_value(LED_PWR_BL_GPIO, 0);
233 gpio_set_value(LED_PWR_RD_GPIO, 0);
234 gpio_set_value(LED_LAN_BL_GPIO, 0);
235 gpio_set_value(LED_LAN_RD_GPIO, 0);
236 gpio_set_value(LED_CLOUD_BL_GPIO, 0);
237 gpio_set_value(LED_CLOUD_RD_GPIO, 0);
239 /* Turn off the PWM GPIO and mux it to EHRPWM */
240 gpio_set_value(LED_PWM_GPIO, 0);
241 enable_shc_board_pwm_pin_mux();
245 static void check_button_status(void)
248 gpio_direction_input(FRONT_BUTTON_GPIO);
249 value = gpio_get_value(FRONT_BUTTON_GPIO);
252 printf("front button activated !\n");
253 env_set("harakiri", "1");
257 #if defined(CONFIG_SPL_BUILD)
258 #ifdef CONFIG_SPL_OS_BOOT
259 int spl_start_uboot(void)
265 static void shc_board_early_init(void)
268 # ifdef CONFIG_SHC_ICT
269 /* Force all modules into enabled state for ICT testing */
270 force_modules_running();
272 /* Force all modules to enter Reset state until released by the OS */
273 force_modules_reset();
278 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
280 #define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
281 #define OSC (V_OSCK/1000000)
282 /* Bosch: Predivider must be fixed to 4, so N = 4-1 */
283 #define MPUPLL_N (4-1)
284 /* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
285 #define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
287 const struct dpll_params dpll_ddr_shc = {
288 400, OSC-1, 1, -1, -1, -1, -1};
290 const struct dpll_params *get_dpll_ddr_params(void)
292 return &dpll_ddr_shc;
296 * As we enabled downspread SSC with 1.8%, the values needed to be corrected
297 * such that the 20% overshoot will not lead to too high frequencies.
298 * In all cases, this is achieved by subtracting one from M (6 MHz less).
299 * Example: 600 MHz CPU
300 * Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
301 * 600 MHz - 6 MHz (1x Fref) = 594 MHz
302 * SSC: 594 MHz * 1.8% = 10.7 MHz SSC
303 * Overshoot: 10.7 MHz * 20 % = 2.2 MHz
304 * --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
306 const struct dpll_params dpll_mpu_shc_opp100 = {
307 99, MPUPLL_N, 1, -1, -1, -1, -1};
309 void am33xx_spl_board_init(void)
317 * Set CORE Frequency to OPP100
318 * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
320 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
322 sil_rev = readl(&cdev->deviceid) >> 28;
324 puts("We do not support Silicon Revisions below 2.0!\n");
328 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
329 if (i2c_probe(TPS65217_CHIP_PM))
333 * Retrieve the CPU max frequency by reading the efuse
334 * SHC-Default: 600 MHz
336 switch (dpll_mpu_opp100.m) {
338 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
341 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
344 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
347 mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
350 mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
353 puts("Cannot determine the frequency, failing!\n");
357 if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
358 puts("tps65217_voltage_update failure\n");
362 /* Set MPU Frequency to what we detected */
363 printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
364 printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
365 dpll_mpu_shc_opp100.m);
366 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
368 /* Enable Spread Spectrum for this freq to be clean on EMI side */
369 set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
372 * Using the default voltages for the PMIC (TPS65217D)
373 * LS1 = 1.8V (VDD_1V8)
374 * LS2 = 3.3V (VDD_3V3A)
375 * LDO1 = 1.8V (VIO and VRTC)
376 * LDO2 = 3.3V (VDD_3V3AUX)
378 shc_board_early_init();
381 void set_uart_mux_conf(void)
383 enable_uart0_pin_mux();
386 void set_mux_conf_regs(void)
388 enable_shc_board_pin_mux();
391 const struct ctrl_ioregs ioregs_evmsk = {
392 .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
393 .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
394 .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
395 .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
396 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
399 static const struct ddr_data ddr3_shc_data = {
400 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
401 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
402 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
403 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
406 static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
407 .cmd0csratio = MT41K256M16HA125E_RATIO,
408 .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
410 .cmd1csratio = MT41K256M16HA125E_RATIO,
411 .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
413 .cmd2csratio = MT41K256M16HA125E_RATIO,
414 .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
417 static struct emif_regs ddr3_shc_emif_reg_data = {
418 .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
419 .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
420 .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
421 .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
422 .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
423 .zq_config = MT41K256M16HA125E_ZQ_CFG,
424 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
428 void sdram_init(void)
430 /* Configure the DDR3 RAM */
431 config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
432 &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
437 * Basic board specific setup. Pinmux has been handled already.
441 #if defined(CONFIG_HW_WATCHDOG)
444 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
445 if (read_eeprom() < 0)
446 puts("EEPROM Content Invalid.\n");
448 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
449 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
457 #ifdef CONFIG_BOARD_LATE_INIT
458 int board_late_init(void)
460 check_button_status();
461 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
462 if (shc_eeprom_valid)
463 if (is_valid_ethaddr(header.mac_addr))
464 eth_env_set_enetaddr("ethaddr", header.mac_addr);
471 #if defined(CONFIG_USB_ETHER) && \
472 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
473 int board_eth_init(bd_t *bis)
475 return usb_eth_initialize(bis);
479 #ifdef CONFIG_SHOW_BOOT_PROGRESS
480 static void bosch_check_reset_pin(void)
482 if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
483 printf("Resetting ...\n");
484 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
485 disable_interrupts();
491 static void hang_bosch(const char *cause, int code)
495 gpio_direction_input(RESET_GPIO);
497 /* Enable reset pin interrupt on falling edge */
498 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
499 writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
504 for (lv = 0; lv < code; lv++) {
505 bosch_check_reset_pin();
507 __udelay(150 * 1000);
509 __udelay(150 * 1000);
511 #if defined(BLINK_CODE)
512 __udelay(300 * 1000);
517 void show_boot_progress(int val)
520 case BOOTSTAGE_ID_NEED_RESET:
521 hang_bosch("need reset", 4);
526 void arch_preboot_os(void)