2 * (C) Copyright 2006 Aubrey.Li, aubrey.li@analog.com
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #if defined(CONFIG_CMD_NAND)
30 #define CONCAT(a,b,c,d) a ## b ## c ## d
31 #define PORT(a,b) CONCAT(pPORT,a,b,)
33 #ifndef CONFIG_NAND_GPIO_PORT
34 #define CONFIG_NAND_GPIO_PORT F
38 * hardware specific access to control-lines
40 static void bfin_hwcontrol(struct mtd_info *mtd, int cmd)
42 register struct nand_chip *this = mtd->priv;
47 this->IO_ADDR_W = CFG_NAND_BASE + BFIN_NAND_CLE;
50 this->IO_ADDR_W = CFG_NAND_BASE;
54 this->IO_ADDR_W = CFG_NAND_BASE + BFIN_NAND_ALE;
57 this->IO_ADDR_W = CFG_NAND_BASE;
64 this->IO_ADDR_R = this->IO_ADDR_W;
66 /* Drain the writebuffer */
70 int bfin_device_ready(struct mtd_info *mtd)
72 int ret = (*PORT(CONFIG_NAND_GPIO_PORT, IO) & BFIN_NAND_READY) ? 1 : 0;
78 * Board-specific NAND initialization. The following members of the
79 * argument are board-specific (per include/linux/mtd/nand.h):
80 * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
81 * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
82 * - hwcontrol: hardwarespecific function for accesing control-lines
83 * - dev_ready: hardwarespecific function for accesing device ready/busy line
84 * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
85 * only be provided if a hardware ECC is available
86 * - eccmode: mode of ecc, see defines
87 * - chip_delay: chip dependent delay for transfering data from array to
89 * - options: various chip options. They can partly be set to inform
90 * nand_scan about special functionality. See the defines for further
92 * Members with a "?" were not set in the merged testing-NAND branch,
93 * so they are not set here either.
95 void board_nand_init(struct nand_chip *nand)
97 *PORT(CONFIG_NAND_GPIO_PORT, _FER) &= ~BFIN_NAND_READY;
98 *PORT(CONFIG_NAND_GPIO_PORT, IO_DIR) &= ~BFIN_NAND_READY;
99 *PORT(CONFIG_NAND_GPIO_PORT, IO_INEN) |= BFIN_NAND_READY;
101 nand->hwcontrol = bfin_hwcontrol;
102 nand->eccmode = NAND_ECC_SOFT;
103 nand->dev_ready = bfin_device_ready;
104 nand->chip_delay = 30;