2 * Copyright (C) 2015 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <atmel_hlcdc.h>
17 #include <asm/arch/at91_common.h>
18 #include <asm/arch/at91_pmc.h>
19 #include <asm/arch/atmel_pio4.h>
20 #include <asm/arch/atmel_usba_udc.h>
21 #include <asm/arch/atmel_sdhci.h>
22 #include <asm/arch/clk.h>
23 #include <asm/arch/gpio.h>
24 #include <asm/arch/sama5d2.h>
26 DECLARE_GLOBAL_DATA_PTR;
28 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
30 return bus == 0 && cs == 0;
33 void spi_cs_activate(struct spi_slave *slave)
35 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 0);
38 void spi_cs_deactivate(struct spi_slave *slave)
40 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
43 static void board_spi0_hw_init(void)
45 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 14, 0);
46 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 15, 0);
47 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 16, 0);
49 atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
51 at91_periph_clk_enable(ATMEL_ID_SPI0);
54 static void board_usb_hw_init(void)
56 atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);
60 vidinfo_t panel_info = {
72 .mmio = ATMEL_BASE_LCDC,
75 /* No power up/down pin for the LCD pannel */
76 void lcd_enable(void) { /* Empty! */ }
77 void lcd_disable(void) { /* Empty! */ }
79 unsigned int has_lcdc(void)
84 static void board_lcd_hw_init(void)
86 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDPWM */
87 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDISP */
88 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDVSYNC */
89 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 31, 0); /* LCDHSYNC */
90 atmel_pio4_set_a_periph(AT91_PIO_PORTD, 0, 0); /* LCDPCK */
91 atmel_pio4_set_a_periph(AT91_PIO_PORTD, 1, 0); /* LCDDEN */
95 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDDAT2 */
96 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDDAT3 */
97 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDDAT4 */
98 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDDAT5 */
99 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDDAT6 */
100 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDDAT7 */
104 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDDAT10 */
105 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDDAT11 */
106 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDDAT12 */
107 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDDAT13 */
108 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDDAT14 */
109 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDDAT15 */
113 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDDAT18 */
114 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDDAT19 */
115 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDAT20 */
116 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 25, 0); /* LCDDAT21 */
117 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDDAT22 */
118 atmel_pio4_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDDAT23 */
120 at91_periph_clk_enable(ATMEL_ID_LCDC);
123 #ifdef CONFIG_LCD_INFO
124 void lcd_show_board_info(void)
130 lcd_printf("%s\n", U_BOOT_VERSION);
131 lcd_printf("2015 ATMEL Corp\n");
132 lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
133 strmhz(temp, get_cpu_clk_rate()));
136 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
137 dram_size += gd->bd->bi_dram[i].size;
139 lcd_printf("%ld MB SDRAM\n", dram_size >> 20);
141 #endif /* CONFIG_LCD_INFO */
142 #endif /* CONFIG_LCD */
144 static void board_gmac_hw_init(void)
146 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 14, 0); /* GTXCK */
147 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 15, 0); /* GTXEN */
148 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 16, 0); /* GRXDV */
149 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 17, 0); /* GRXER */
150 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 18, 0); /* GRX0 */
151 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 19, 0); /* GRX1 */
152 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 20, 0); /* GTX0 */
153 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 21, 0); /* GTX1 */
154 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 22, 0); /* GMDC */
155 atmel_pio4_set_f_periph(AT91_PIO_PORTB, 23, 0); /* GMDIO */
157 at91_periph_clk_enable(ATMEL_ID_GMAC);
160 static void board_sdhci0_hw_init(void)
162 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SDMMC0_CK */
163 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SDMMC0_CMD */
164 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SDMMC0_DAT0 */
165 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 3, 0); /* SDMMC0_DAT1 */
166 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 4, 0); /* SDMMC0_DAT2 */
167 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 5, 0); /* SDMMC0_DAT3 */
168 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 6, 0); /* SDMMC0_DAT4 */
169 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 7, 0); /* SDMMC0_DAT5 */
170 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 8, 0); /* SDMMC0_DAT6 */
171 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 9, 0); /* SDMMC0_DAT7 */
172 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 10, 0); /* SDMMC0_RSTN */
173 atmel_pio4_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SDMMC0_VDDSEL */
175 at91_periph_clk_enable(ATMEL_ID_SDMMC0);
176 at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0,
177 GCK_CSS_PLLA_CLK, 1);
180 static void board_sdhci1_hw_init(void)
182 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 18, 0); /* SDMMC1_DAT0 */
183 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 19, 0); /* SDMMC1_DAT1 */
184 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 20, 0); /* SDMMC1_DAT2 */
185 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 21, 0); /* SDMMC1_DAT3 */
186 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 22, 0); /* SDMMC1_CK */
187 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 27, 0); /* SDMMC1_RSTN */
188 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 28, 0); /* SDMMC1_CMD */
189 atmel_pio4_set_e_periph(AT91_PIO_PORTA, 30, 0); /* SDMMC1_CD */
191 at91_periph_clk_enable(ATMEL_ID_SDMMC1);
192 at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1,
193 GCK_CSS_PLLA_CLK, 1);
196 int board_mmc_init(bd_t *bis)
198 #ifdef CONFIG_ATMEL_SDHCI0
199 atmel_sdhci_init((void *)ATMEL_BASE_SDMMC0, ATMEL_ID_SDMMC0);
201 #ifdef CONFIG_ATMEL_SDHCI1
202 atmel_sdhci_init((void *)ATMEL_BASE_SDMMC1, ATMEL_ID_SDMMC1);
208 static void board_uart1_hw_init(void)
210 atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, 1); /* URXD1 */
211 atmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0); /* UTXD1 */
213 at91_periph_clk_enable(ATMEL_ID_UART1);
216 int board_early_init_f(void)
218 at91_periph_clk_enable(ATMEL_ID_PIOA);
219 at91_periph_clk_enable(ATMEL_ID_PIOB);
220 at91_periph_clk_enable(ATMEL_ID_PIOC);
221 at91_periph_clk_enable(ATMEL_ID_PIOD);
223 board_uart1_hw_init();
230 /* address of boot parameters */
231 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
233 #ifdef CONFIG_ATMEL_SPI
234 board_spi0_hw_init();
236 #ifdef CONFIG_ATMEL_SDHCI
237 #ifdef CONFIG_ATMEL_SDHCI0
238 board_sdhci0_hw_init();
240 #ifdef CONFIG_ATMEL_SDHCI1
241 board_sdhci1_hw_init();
245 board_gmac_hw_init();
250 #ifdef CONFIG_CMD_USB
253 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
262 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
263 CONFIG_SYS_SDRAM_SIZE);
267 int board_eth_init(bd_t *bis)
272 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
275 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
276 usba_udc_probe(&pdata);
277 #ifdef CONFIG_USB_ETH_RNDIS
278 usb_eth_initialize(bis);