3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
28 /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
29 * has nothing to do with the flash chip being 8-bit or 16-bit.
31 #ifdef CONFIG_FLASH_16BIT
32 typedef unsigned short FLASH_PORT_WIDTH;
33 typedef volatile unsigned short FLASH_PORT_WIDTHV;
34 #define FLASH_ID_MASK 0xFFFF
36 typedef unsigned long FLASH_PORT_WIDTH;
37 typedef volatile unsigned long FLASH_PORT_WIDTHV;
38 #define FLASH_ID_MASK 0xFFFFFFFF
41 #define FPW FLASH_PORT_WIDTH
42 #define FPWV FLASH_PORT_WIDTHV
44 #define ORMASK(size) ((-size) & OR_AM_MSK)
46 #define FLASH_CYCLE1 0x0555
47 #define FLASH_CYCLE2 0x02aa
49 /*-----------------------------------------------------------------------
52 static ulong flash_get_size(FPWV *addr, flash_info_t *info);
53 static void flash_reset(flash_info_t *info);
54 static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
55 static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
56 static void flash_get_offsets(ulong base, flash_info_t *info);
57 static flash_info_t *flash_get_info(ulong base);
59 /*-----------------------------------------------------------------------
62 * sets up flash_info and returns size of FLASH (bytes)
64 unsigned long flash_init (void)
66 unsigned long size = 0;
69 /* Init: no FLASHes known */
70 for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
72 ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2;
74 ulong flashbase = CONFIG_SYS_FLASH_BASE;
77 memset(&flash_info[i], 0, sizeof(flash_info_t));
80 flash_get_size((FPW *)flashbase, &flash_info[i]);
82 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
83 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
84 i, flash_info[i].size);
87 size += flash_info[i].size;
90 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
91 /* monitor protection ON by default */
92 flash_protect(FLAG_PROTECT_SET,
93 CONFIG_SYS_MONITOR_BASE,
94 CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
95 flash_get_info(CONFIG_SYS_MONITOR_BASE));
98 #ifdef CONFIG_ENV_IS_IN_FLASH
99 /* ENV protection ON by default */
100 flash_protect(FLAG_PROTECT_SET,
102 CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
103 flash_get_info(CONFIG_ENV_ADDR));
107 return size ? size : 1;
110 /*-----------------------------------------------------------------------
112 static void flash_reset(flash_info_t *info)
114 FPWV *base = (FPWV *)(info->start[0]);
116 /* Put FLASH back in read mode */
117 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
118 *base = (FPW)0x00FF00FF; /* Intel Read Mode */
119 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
120 *base = (FPW)0x00F000F0; /* AMD Read Mode */
123 /*-----------------------------------------------------------------------
125 static void flash_get_offsets (ulong base, flash_info_t *info)
129 /* set up sector start address table */
130 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
131 && (info->flash_id & FLASH_BTYPE)) {
132 int bootsect_size; /* number of bytes/boot sector */
133 int sect_size; /* number of bytes/regular sector */
135 bootsect_size = 0x00002000 * (sizeof(FPW)/2);
136 sect_size = 0x00010000 * (sizeof(FPW)/2);
138 /* set sector offsets for bottom boot block type */
139 for (i = 0; i < 8; ++i) {
140 info->start[i] = base + (i * bootsect_size);
142 for (i = 8; i < info->sector_count; i++) {
143 info->start[i] = base + ((i - 7) * sect_size);
146 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
147 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
149 int sect_size; /* number of bytes/sector */
151 sect_size = 0x00010000 * (sizeof(FPW)/2);
153 /* set up sector start address table (uniform sector type) */
154 for( i = 0; i < info->sector_count; i++ )
155 info->start[i] = base + (i * sect_size);
159 /*-----------------------------------------------------------------------
162 static flash_info_t *flash_get_info(ulong base)
167 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) {
168 info = & flash_info[i];
169 if (info->start[0] <= base && base < info->start[0] + info->size)
173 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
176 /*-----------------------------------------------------------------------
179 void flash_print_info (flash_info_t *info)
185 uchar botbootletter[] = "B";
186 uchar topbootletter[] = "T";
187 uchar botboottype[] = "bottom boot sector";
188 uchar topboottype[] = "top boot sector";
190 if (info->flash_id == FLASH_UNKNOWN) {
191 printf ("missing or unknown FLASH type\n");
195 switch (info->flash_id & FLASH_VENDMASK) {
196 case FLASH_MAN_AMD: printf ("AMD "); break;
197 case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
198 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
199 case FLASH_MAN_SST: printf ("SST "); break;
200 case FLASH_MAN_STM: printf ("STM "); break;
201 case FLASH_MAN_INTEL: printf ("INTEL "); break;
202 default: printf ("Unknown Vendor "); break;
205 /* check for top or bottom boot, if it applies */
206 if (info->flash_id & FLASH_BTYPE) {
207 boottype = botboottype;
208 bootletter = botbootletter;
211 boottype = topboottype;
212 bootletter = topbootletter;
215 switch (info->flash_id & FLASH_TYPEMASK) {
217 fmt = "29LV641D (64 Mbit, uniform sectors)\n";
219 case FLASH_28F800C3B:
220 case FLASH_28F800C3T:
221 fmt = "28F800C3%s (8 Mbit, %s)\n";
223 case FLASH_INTEL800B:
224 case FLASH_INTEL800T:
225 fmt = "28F800B3%s (8 Mbit, %s)\n";
227 case FLASH_28F160C3B:
228 case FLASH_28F160C3T:
229 fmt = "28F160C3%s (16 Mbit, %s)\n";
231 case FLASH_INTEL160B:
232 case FLASH_INTEL160T:
233 fmt = "28F160B3%s (16 Mbit, %s)\n";
235 case FLASH_28F320C3B:
236 case FLASH_28F320C3T:
237 fmt = "28F320C3%s (32 Mbit, %s)\n";
239 case FLASH_INTEL320B:
240 case FLASH_INTEL320T:
241 fmt = "28F320B3%s (32 Mbit, %s)\n";
243 case FLASH_28F640C3B:
244 case FLASH_28F640C3T:
245 fmt = "28F640C3%s (64 Mbit, %s)\n";
247 case FLASH_INTEL640B:
248 case FLASH_INTEL640T:
249 fmt = "28F640B3%s (64 Mbit, %s)\n";
252 fmt = "Unknown Chip Type\n";
256 printf (fmt, bootletter, boottype);
258 printf (" Size: %ld MB in %d Sectors\n",
262 printf (" Sector Start Addresses:");
264 for (i=0; i<info->sector_count; ++i) {
269 printf (" %08lX%s", info->start[i],
270 info->protect[i] ? " (RO)" : " ");
276 /*-----------------------------------------------------------------------
280 * The following code cannot be run from FLASH!
283 ulong flash_get_size (FPWV *addr, flash_info_t *info)
285 /* Write auto select command: read Manufacturer ID */
287 /* Write auto select command sequence and test FLASH answer */
288 addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
289 addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
290 addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
292 /* The manufacturer codes are only 1 byte, so just use 1 byte.
293 * This works for any bus width and any FLASH device width.
296 switch (addr[0] & 0xff) {
298 case (uchar)AMD_MANUFACT:
299 info->flash_id = FLASH_MAN_AMD;
302 case (uchar)INTEL_MANUFACT:
303 info->flash_id = FLASH_MAN_INTEL;
307 info->flash_id = FLASH_UNKNOWN;
308 info->sector_count = 0;
313 /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
314 if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
316 case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
317 info->flash_id += FLASH_AM640U;
318 info->sector_count = 128;
319 info->size = 0x00800000 * (sizeof(FPW)/2);
320 break; /* => 8 or 16 MB */
322 case (FPW)INTEL_ID_28F800C3B:
323 info->flash_id += FLASH_28F800C3B;
324 info->sector_count = 23;
325 info->size = 0x00100000 * (sizeof(FPW)/2);
326 break; /* => 1 or 2 MB */
328 case (FPW)INTEL_ID_28F800B3B:
329 info->flash_id += FLASH_INTEL800B;
330 info->sector_count = 23;
331 info->size = 0x00100000 * (sizeof(FPW)/2);
332 break; /* => 1 or 2 MB */
334 case (FPW)INTEL_ID_28F160C3B:
335 info->flash_id += FLASH_28F160C3B;
336 info->sector_count = 39;
337 info->size = 0x00200000 * (sizeof(FPW)/2);
338 break; /* => 2 or 4 MB */
340 case (FPW)INTEL_ID_28F160B3B:
341 info->flash_id += FLASH_INTEL160B;
342 info->sector_count = 39;
343 info->size = 0x00200000 * (sizeof(FPW)/2);
344 break; /* => 2 or 4 MB */
346 case (FPW)INTEL_ID_28F320C3B:
347 info->flash_id += FLASH_28F320C3B;
348 info->sector_count = 71;
349 info->size = 0x00400000 * (sizeof(FPW)/2);
350 break; /* => 4 or 8 MB */
352 case (FPW)INTEL_ID_28F320B3B:
353 info->flash_id += FLASH_INTEL320B;
354 info->sector_count = 71;
355 info->size = 0x00400000 * (sizeof(FPW)/2);
356 break; /* => 4 or 8 MB */
358 case (FPW)INTEL_ID_28F640C3B:
359 info->flash_id += FLASH_28F640C3B;
360 info->sector_count = 135;
361 info->size = 0x00800000 * (sizeof(FPW)/2);
362 break; /* => 8 or 16 MB */
364 case (FPW)INTEL_ID_28F640B3B:
365 info->flash_id += FLASH_INTEL640B;
366 info->sector_count = 135;
367 info->size = 0x00800000 * (sizeof(FPW)/2);
368 break; /* => 8 or 16 MB */
371 info->flash_id = FLASH_UNKNOWN;
372 info->sector_count = 0;
374 return (0); /* => no or unknown flash */
377 flash_get_offsets((ulong)addr, info);
379 /* Put FLASH back in read mode */
385 /*-----------------------------------------------------------------------
388 int flash_erase (flash_info_t *info, int s_first, int s_last)
391 int flag, prot, sect;
392 int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
393 ulong start, now, last;
396 if ((s_first < 0) || (s_first > s_last)) {
397 if (info->flash_id == FLASH_UNKNOWN) {
398 printf ("- missing\n");
400 printf ("- no sectors to erase\n");
405 switch (info->flash_id & FLASH_TYPEMASK) {
406 case FLASH_INTEL800B:
407 case FLASH_INTEL160B:
408 case FLASH_INTEL320B:
409 case FLASH_INTEL640B:
410 case FLASH_28F800C3B:
411 case FLASH_28F160C3B:
412 case FLASH_28F320C3B:
413 case FLASH_28F640C3B:
418 printf ("Can't erase unknown flash type %08lx - aborted\n",
424 for (sect=s_first; sect<=s_last; ++sect) {
425 if (info->protect[sect]) {
431 printf ("- Warning: %d protected sectors will not be erased!\n",
439 /* Start erase on unprotected sectors */
440 for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
442 if (info->protect[sect] != 0) /* protected, skip it */
445 /* Disable interrupts which might cause a timeout here */
446 flag = disable_interrupts();
448 addr = (FPWV *)(info->start[sect]);
450 *addr = (FPW)0x00500050; /* clear status register */
451 *addr = (FPW)0x00200020; /* erase setup */
452 *addr = (FPW)0x00D000D0; /* erase confirm */
455 /* must be AMD style if not Intel */
456 FPWV *base; /* first address in bank */
458 base = (FPWV *)(info->start[0]);
459 base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
460 base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
461 base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
462 base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
463 base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
464 *addr = (FPW)0x00300030; /* erase sector */
467 /* re-enable interrupts if necessary */
471 start = get_timer(0);
473 /* wait at least 50us for AMD, 80us for Intel.
478 while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
479 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
480 printf ("Timeout\n");
484 *addr = (FPW)0x00B000B0;
487 flash_reset(info); /* reset to read mode */
488 rcode = 1; /* failed */
492 /* show that we're waiting */
493 if ((get_timer(last)) > CONFIG_SYS_HZ) {/* every second */
499 /* show that we're waiting */
500 if ((get_timer(last)) > CONFIG_SYS_HZ) { /* every second */
505 flash_reset(info); /* reset to read mode */
512 /*-----------------------------------------------------------------------
513 * Copy memory to flash, returns:
516 * 2 - Flash not erased
518 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
520 FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
521 int bytes; /* number of bytes to program in current word */
522 int left; /* number of bytes left to program */
525 for (left = cnt, res = 0;
526 left > 0 && res == 0;
527 addr += sizeof(data), left -= sizeof(data) - bytes) {
529 bytes = addr & (sizeof(data) - 1);
530 addr &= ~(sizeof(data) - 1);
532 /* combine source and destination data so can program
533 * an entire word of 16 or 32 bits
535 for (i = 0; i < sizeof(data); i++) {
537 if (i < bytes || i - bytes >= left )
538 data += *((uchar *)addr + i);
543 /* write one word to the flash */
544 switch (info->flash_id & FLASH_VENDMASK) {
546 res = write_word_amd(info, (FPWV *)addr, data);
548 case FLASH_MAN_INTEL:
549 res = write_word_intel(info, (FPWV *)addr, data);
552 /* unknown flash type, error! */
553 printf ("missing or unknown FLASH type\n");
554 res = 1; /* not really a timeout, but gives error */
562 /*-----------------------------------------------------------------------
563 * Write a word to Flash for AMD FLASH
564 * A word is 16 or 32 bits, whichever the bus width of the flash bank
565 * (not an individual chip) is.
570 * 2 - Flash not erased
572 static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
576 int res = 0; /* result, assume success */
577 FPWV *base; /* first address in flash bank */
579 /* Check if Flash is (sufficiently) erased */
580 if ((*dest & data) != data) {
585 base = (FPWV *)(info->start[0]);
587 /* Disable interrupts which might cause a timeout here */
588 flag = disable_interrupts();
590 base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
591 base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
592 base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
594 *dest = data; /* start programming the data */
596 /* re-enable interrupts if necessary */
600 start = get_timer (0);
602 /* data polling for D7 */
603 while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
604 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
605 *dest = (FPW)0x00F000F0; /* reset bank */
613 /*-----------------------------------------------------------------------
614 * Write a word to Flash for Intel FLASH
615 * A word is 16 or 32 bits, whichever the bus width of the flash bank
616 * (not an individual chip) is.
621 * 2 - Flash not erased
623 static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
627 int res = 0; /* result, assume success */
629 /* Check if Flash is (sufficiently) erased */
630 if ((*dest & data) != data) {
634 /* Disable interrupts which might cause a timeout here */
635 flag = disable_interrupts();
637 *dest = (FPW)0x00500050; /* clear status register */
638 *dest = (FPW)0x00FF00FF; /* make sure in read mode */
639 *dest = (FPW)0x00400040; /* program setup */
641 *dest = data; /* start programming the data */
643 /* re-enable interrupts if necessary */
647 start = get_timer (0);
649 while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
650 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
651 *dest = (FPW)0x00B000B0; /* Suspend program */
656 if (res == 0 && (*dest & (FPW)0x00100010))
657 res = 1; /* write failed, time out error is close enough */
659 *dest = (FPW)0x00500050; /* clear status register */
660 *dest = (FPW)0x00FF00FF; /* make sure in read mode */