board/armltd/vexpress64/vexpress64.c

   1 /*
   2  * (C) Copyright 2013
   3  * David Feng <fenghua@phytium.com.cn>
   4  * Sharma Bhupesh <bhupesh.sharma@freescale.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #include <common.h>
   9 #include <malloc.h>
  10 #include <errno.h>
  11 #include <netdev.h>
  12 #include <asm/io.h>
  13 #include <linux/compiler.h>
  14 #include <dm/platdata.h>
  15 #include <dm/platform_data/serial_pl01x.h>
  16 #include "pcie.h"
  17 #include <asm/armv8/mmu.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 static const struct pl01x_serial_platdata serial_platdata = {
  22         .base = V2M_UART0,
  23         .type = TYPE_PL011,
  24         .clock = CONFIG_PL011_CLOCK,
  25 };
  26
  27 U_BOOT_DEVICE(vexpress_serials) = {
  28         .name = "serial_pl01x",
  29         .platdata = &serial_platdata,
  30 };
  31
  32 static struct mm_region vexpress64_mem_map[] = {
  33         {
  34                 .base = 0x0UL,
  35                 .size = 0x80000000UL,
  36                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  37                          PTE_BLOCK_NON_SHARE |
  38                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  39         }, {
  40                 .base = 0x80000000UL,
  41                 .size = 0xff80000000UL,
  42                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  43                          PTE_BLOCK_INNER_SHARE
  44         }, {
  45                 /* List terminator */
  46                 0,
  47         }
  48 };
  49
  50 struct mm_region *mem_map = vexpress64_mem_map;
  51
  52 /* This function gets replaced by platforms supporting PCIe.
  53  * The replacement function, eg. on Juno, initialises the PCIe bus.
  54  */
  55 __weak void vexpress64_pcie_init(void)
  56 {
  57 }
  58
  59 int board_init(void)
  60 {
  61         vexpress64_pcie_init();
  62         return 0;
  63 }
  64
  65 int dram_init(void)
  66 {
  67         gd->ram_size = PHYS_SDRAM_1_SIZE;
  68         return 0;
  69 }
  70
  71 void dram_init_banksize(void)
  72 {
  73         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  74         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  75 #ifdef PHYS_SDRAM_2
  76         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  77         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  78 #endif
  79 }
  80
  81 /*
  82  * Board specific reset that is system reset.
  83  */
  84 void reset_cpu(ulong addr)
  85 {
  86 }
  87
  88 /*
  89  * Board specific ethernet initialization routine.
  90  */
  91 int board_eth_init(bd_t *bis)
  92 {
  93         int rc = 0;
  94 #ifdef CONFIG_SMC91111
  95         rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
  96 #endif
  97 #ifdef CONFIG_SMC911X
  98         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  99 #endif
 100         return rc;
 101 }