2 * Board specific setup info
4 * (C) Copyright 2004, ARM Ltd.
5 * Philippe Robin, <philippe.robin@arm.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 /* Reset using CM control register */
18 orr r1,r1,#CMMASK_RESET
24 /* Set up the platform, once the cpu has been initialized */
27 /* If U-Boot has been run after the ARM boot monitor
28 * then all the necessary actions have been done
29 * otherwise we are running from user flash mapped to 0x00000000
30 * --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED --
31 * Changes to the (possibly soft) reset defaults of the processor
32 * itself should be performed in cpu/arm<>/start.S
33 * This function affects only the core module or board settings
37 /* CM has an initialization register
38 * - bits in it are wired into test-chip pins to force
40 * - may need to change its contents for U-Boot
43 /* set the desired CM specific value */
44 mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
46 #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
47 orr r2,r2,#CMMASK_INIT_102
50 #if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
51 !defined (CONFIG_CM940T)
53 #ifdef CONFIG_CM_MULTIPLE_SSRAM
54 /* set simple mapping */
55 and r2,r2,#CMMASK_MAP_SIMPLE
56 #endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
58 #ifdef CONFIG_CM_TCRAM
60 and r2,r2,#CMMASK_TCRAM_DISABLE
61 #endif /* #ifdef CONFIG_CM_TCRAM */
63 #if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
64 defined (CONFIG_CM1136JF_S)
68 #endif /* cpu with little endian initialization */
70 orr r2,r2,#CMMASK_CMxx6_COMMON
72 #endif /* CMxx6 code */
74 #endif /* ARM102xxE value */
78 ldr r1, [r0, #OS_INIT]
79 /* check against desired bit setting */
86 add r3,r3,#CMVAL_LOCK2
87 str r3, [r0, #OS_LOCK]
88 /* set desired value */
90 /* write & relock CM_INIT */
91 str r1, [r0, #OS_INIT]
93 str r1, [r0, #OS_LOCK]
95 /* soft reset so new values used */
100 #endif /* CONFIG_CM_INIT */
104 #ifdef CONFIG_CM_SPD_DETECT
105 /* Fast memory is available for the DRAM data
106 * - ensure it has been transferred, then summarize the data
111 stmfd r13!,{r4-r6,lr}
112 /* set up SDRAM info */
113 /* - based on example code from the CM User Guide */
117 ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
118 and r1, r1, #0x20 /* mask SPD bit (5) */
119 cmp r1, #0x20 /* test if set */
123 add r0, r0, #OS_SPD /* address the copy of the SDP data */
124 ldrb r1, [r0, #3] /* number of row address lines */
125 ldrb r2, [r0, #4] /* number of column address lines */
126 ldrb r3, [r0, #5] /* number of banks */
127 ldrb r4, [r0, #31] /* module bank density */
128 mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
129 mov r5, r5, ASL#2 /* size in MB */
130 mov r0, #CM_BASE /* reload for later code */
131 cmp r5, #0x10 /* is it 16MB? */
133 mov r6, #0x2 /* store size and CAS latency of 2 */
137 cmp r5, #0x20 /* is it 32MB? */
143 cmp r5, #0x40 /* is it 64MB? */
149 cmp r5, #0x80 /* is it 128MB? */
155 /* if it is none of these sizes then it is either 256MB, or
156 * there is no SDRAM fitted so default to 256MB
161 mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
162 orr r2, r1, r2, ASL#12 /* OR in column address lines */
163 orr r3, r2, r3, ASL#16 /* OR in number of banks */
164 orr r6, r6, r3 /* OR in size and CAS latency */
165 str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
167 #endif /* #ifdef CONFIG_CM_SPD_DETECT */
169 ldmfd r13!,{r4-r6,pc} /* back to caller */
171 #ifdef CONFIG_CM_REMAP
172 /* CM remap bit is operational
173 * - use it to map writeable memory at 0x00000000, in place of flash
177 stmfd r13!,{r4-r10,lr}
180 ldr r1, [r0, #OS_CTRL]
181 orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
182 str r1, [r0, #OS_CTRL]
184 /* Now 0x00000000 is writeable, replace the vectors */
185 ldr r0, =_start /* r0 <- start of vectors */
186 ldr r2, =_TEXT_BASE /* r2 <- past vectors */
187 sub r1,r1,r1 /* destination 0x00000000 */
190 ldmia r0!, {r3-r10} /* copy from source address [r0] */
191 stmia r1!, {r3-r10} /* copy to target address [r1] */
192 cmp r0, r2 /* until source end address [r2] */
195 ldmfd r13!,{r4-r10,pc} /* back to caller */
197 #endif /* #ifdef CONFIG_CM_REMAP */