3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
6 * Add support for Am29F016D and dynamic switch setting.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * Wait for completion of each sector erase command issued
31 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
36 #include <asm/processor.h>
41 #define DEBUGF(x...) printf(x)
46 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
49 * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
51 static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = {
52 {0xfff00000, 0xfff80000, 0xe7c00001}, /* 0:boot from small flash */
53 {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
54 {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
55 {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
56 {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
57 {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
58 {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */
59 {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */
60 {0xfff00000, 0xfff80000, 0xe7c00001}, /* 8:boot from small flash */
64 * include common flash code (for amcc boards)
66 /*-----------------------------------------------------------------------
69 static int write_word(flash_info_t * info, ulong dest, ulong data);
70 #ifdef CFG_FLASH_2ND_16BIT_DEV
71 static int write_word_1(flash_info_t * info, ulong dest, ulong data);
72 static int write_word_2(flash_info_t * info, ulong dest, ulong data);
73 static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
74 static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
75 static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
76 static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
79 void flash_print_info(flash_info_t * info)
85 volatile unsigned long *flash;
87 if (info->flash_id == FLASH_UNKNOWN) {
88 printf("missing or unknown FLASH type\n");
92 switch (info->flash_id & FLASH_VENDMASK) {
109 printf("Unknown Vendor ");
113 switch (info->flash_id & FLASH_TYPEMASK) {
115 printf("AM29F040 (512 Kbit, uniform sector size)\n");
118 printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
121 printf("AM29LV400T (4 Mbit, top boot sector)\n");
124 printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
127 printf("AM29LV800T (8 Mbit, top boot sector)\n");
130 printf("AM29F016D (16 Mbit, uniform sector size)\n");
133 printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
136 printf("AM29LV160T (16 Mbit, top boot sector)\n");
139 printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
142 printf("AM29LV320T (32 Mbit, top boot sector)\n");
145 printf("AM29LV033C (32 Mbit, top boot sector)\n");
148 printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
151 printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
153 case FLASH_STMW320DT:
154 printf ("M29W320DT (32 M, top sector)\n");
157 printf ("MXLV320T (32 Mbit, top sector)\n");
160 printf("Unknown Chip Type\n");
164 printf(" Size: %ld KB in %d Sectors\n",
165 info->size >> 10, info->sector_count);
167 printf(" Sector Start Addresses:");
168 for (i = 0; i < info->sector_count; ++i) {
170 * Check if whole sector is erased
172 if (i != (info->sector_count - 1))
173 size = info->start[i + 1] - info->start[i];
175 size = info->start[0] + info->size - info->start[i];
177 flash = (volatile unsigned long *)info->start[i];
178 size = size >> 2; /* divide by 4 for longword access */
179 for (k = 0; k < size; k++) {
180 if (*flash++ != 0xffffffff) {
191 info->protect[i] ? "RO " : " ");
199 * The following code cannot be run from FLASH!
201 #ifdef CFG_FLASH_2ND_16BIT_DEV
202 static ulong flash_get_size(vu_long * addr, flash_info_t * info)
204 /* bit 0 used for big flash marking */
205 if ((ulong)addr & 0x1)
206 return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
208 return flash_get_size_1(addr, info);
211 static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
213 static ulong flash_get_size(vu_long * addr, flash_info_t * info)
217 CFG_FLASH_WORD_SIZE value;
218 ulong base = (ulong) addr;
219 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
221 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
223 /* Write auto select command: read Manufacturer ID */
224 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
225 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
226 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
230 DEBUGF("FLASH MANUFACT: %x\n", value);
233 case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
234 info->flash_id = FLASH_MAN_AMD;
236 case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
237 info->flash_id = FLASH_MAN_FUJ;
239 case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
240 info->flash_id = FLASH_MAN_SST;
242 case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
243 info->flash_id = FLASH_MAN_STM;
246 info->flash_id = FLASH_UNKNOWN;
247 info->sector_count = 0;
249 return (0); /* no or unknown flash */
252 value = addr2[1]; /* device ID */
253 DEBUGF("\nFLASH DEVICEID: %x\n", value);
256 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
257 info->flash_id += FLASH_AM040;
258 info->sector_count = 8;
259 info->size = 0x0080000; /* => 512 ko */
262 case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
263 info->flash_id += FLASH_AM040;
264 info->sector_count = 8;
265 info->size = 0x0080000; /* => 512 ko */
268 case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
269 info->flash_id += FLASH_AM040;
270 info->sector_count = 8;
271 info->size = 0x0080000; /* => 512 ko */
274 case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
275 info->flash_id += FLASH_AMD016;
276 info->sector_count = 32;
277 info->size = 0x00200000;
280 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
281 info->flash_id += FLASH_AMDLV033C;
282 info->sector_count = 64;
283 info->size = 0x00400000;
286 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
287 info->flash_id += FLASH_AM400T;
288 info->sector_count = 11;
289 info->size = 0x00080000;
290 break; /* => 0.5 MB */
292 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
293 info->flash_id += FLASH_AM400B;
294 info->sector_count = 11;
295 info->size = 0x00080000;
296 break; /* => 0.5 MB */
298 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
299 info->flash_id += FLASH_AM800T;
300 info->sector_count = 19;
301 info->size = 0x00100000;
304 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
305 info->flash_id += FLASH_AM800B;
306 info->sector_count = 19;
307 info->size = 0x00100000;
310 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
311 info->flash_id += FLASH_AM160T;
312 info->sector_count = 35;
313 info->size = 0x00200000;
316 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
317 info->flash_id += FLASH_AM160B;
318 info->sector_count = 35;
319 info->size = 0x00200000;
323 info->flash_id = FLASH_UNKNOWN;
324 return (0); /* => no or unknown flash */
327 /* set up sector start address table */
328 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
329 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
330 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
331 for (i = 0; i < info->sector_count; i++)
332 info->start[i] = base + (i * 0x00010000);
334 if (info->flash_id & FLASH_BTYPE) {
335 /* set sector offsets for bottom boot block type */
336 info->start[0] = base + 0x00000000;
337 info->start[1] = base + 0x00004000;
338 info->start[2] = base + 0x00006000;
339 info->start[3] = base + 0x00008000;
340 for (i = 4; i < info->sector_count; i++) {
342 base + (i * 0x00010000) - 0x00030000;
345 /* set sector offsets for top boot block type */
346 i = info->sector_count - 1;
347 info->start[i--] = base + info->size - 0x00004000;
348 info->start[i--] = base + info->size - 0x00006000;
349 info->start[i--] = base + info->size - 0x00008000;
350 for (; i >= 0; i--) {
351 info->start[i] = base + i * 0x00010000;
356 /* check for protected sectors */
357 for (i = 0; i < info->sector_count; i++) {
358 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
359 /* D0 = 1 if protected */
360 addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
362 /* For AMD29033C flash we need to resend the command of *
363 * reading flash protection for upper 8 Mb of flash */
365 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
366 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
367 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
370 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
371 info->protect[i] = 0;
373 info->protect[i] = addr2[2] & 1;
376 /* issue bank reset to return to read mode */
377 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
382 static int wait_for_DQ7_1(flash_info_t * info, int sect)
384 ulong start, now, last;
385 volatile CFG_FLASH_WORD_SIZE *addr =
386 (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
388 start = get_timer(0);
390 while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
391 (CFG_FLASH_WORD_SIZE) 0x00800080) {
392 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
396 /* show that we're waiting */
397 if ((now - last) > 1000) { /* every second */
405 #ifdef CFG_FLASH_2ND_16BIT_DEV
406 int flash_erase(flash_info_t * info, int s_first, int s_last)
408 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
409 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
410 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
411 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
412 return flash_erase_2(info, s_first, s_last);
414 return flash_erase_1(info, s_first, s_last);
418 static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
420 int flash_erase(flash_info_t * info, int s_first, int s_last)
423 volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
424 volatile CFG_FLASH_WORD_SIZE *addr2;
425 int flag, prot, sect, l_sect;
428 if ((s_first < 0) || (s_first > s_last)) {
429 if (info->flash_id == FLASH_UNKNOWN)
430 printf("- missing\n");
432 printf("- no sectors to erase\n");
436 if (info->flash_id == FLASH_UNKNOWN) {
437 printf("Can't erase unknown flash type - aborted\n");
442 for (sect = s_first; sect <= s_last; ++sect) {
443 if (info->protect[sect])
448 printf("- Warning: %d protected sectors will not be erased!", prot);
454 /* Disable interrupts which might cause a timeout here */
455 flag = disable_interrupts();
457 /* Start erase on unprotected sectors */
458 for (sect = s_first; sect <= s_last; sect++) {
459 if (info->protect[sect] == 0) { /* not protected */
460 addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
462 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
463 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
464 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
465 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
466 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
467 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
468 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
469 for (i = 0; i < 50; i++)
470 udelay(1000); /* wait 1 ms */
472 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
473 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
474 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
475 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
476 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
477 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
481 * Wait for each sector to complete, it's more
482 * reliable. According to AMD Spec, you must
483 * issue all erase commands within a specified
484 * timeout. This has been seen to fail, especially
485 * if printf()s are included (for debug)!!
487 wait_for_DQ7_1(info, sect);
491 /* re-enable interrupts if necessary */
495 /* wait at least 80us - let's wait 1 ms */
498 /* reset to read mode */
499 addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
500 addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
506 /*-----------------------------------------------------------------------
507 * Copy memory to flash, returns:
510 * 2 - Flash not erased
512 int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
517 wp = (addr & ~3); /* get lower word aligned address */
520 * handle unaligned start bytes
522 if ((l = addr - wp) != 0) {
524 for (i = 0, cp = wp; i < l; ++i, ++cp)
525 data = (data << 8) | (*(uchar *) cp);
527 for (; i < 4 && cnt > 0; ++i) {
528 data = (data << 8) | *src++;
533 for (; cnt == 0 && i < 4; ++i, ++cp)
534 data = (data << 8) | (*(uchar *) cp);
536 if ((rc = write_word(info, wp, data)) != 0)
543 * handle word aligned part
547 for (i = 0; i < 4; ++i)
548 data = (data << 8) | *src++;
550 if ((rc = write_word(info, wp, data)) != 0)
561 * handle unaligned tail bytes
564 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
565 data = (data << 8) | *src++;
568 for (; i < 4; ++i, ++cp)
569 data = (data << 8) | (*(uchar *) cp);
571 return (write_word(info, wp, data));
574 /*-----------------------------------------------------------------------
575 * Copy memory to flash, returns:
578 * 2 - Flash not erased
580 #ifdef CFG_FLASH_2ND_16BIT_DEV
581 static int write_word(flash_info_t * info, ulong dest, ulong data)
583 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
584 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
585 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
586 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
587 return write_word_2(info, dest, data);
589 return write_word_1(info, dest, data);
593 static int write_word_1(flash_info_t * info, ulong dest, ulong data)
595 static int write_word(flash_info_t * info, ulong dest, ulong data)
598 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
599 volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
600 volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
604 /* Check if Flash is (sufficiently) erased */
605 if ((*((vu_long *)dest) & data) != data)
608 for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
609 /* Disable interrupts which might cause a timeout here */
610 flag = disable_interrupts();
612 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
613 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
614 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
618 /* re-enable interrupts if necessary */
622 /* data polling for D7 */
623 start = get_timer(0);
624 while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
625 (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
627 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
635 #ifdef CFG_FLASH_2ND_16BIT_DEV
637 #undef CFG_FLASH_WORD_SIZE
638 #define CFG_FLASH_WORD_SIZE unsigned short
641 * The following code cannot be run from FLASH!
643 static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
647 CFG_FLASH_WORD_SIZE value;
648 ulong base = (ulong) addr;
649 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
651 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
653 /* issue bank reset to return to read mode */
654 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
655 /* Write auto select command: read Manufacturer ID */
656 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
657 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
658 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
662 DEBUGF("FLASH MANUFACT: %x\n", value);
665 case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
666 info->flash_id = FLASH_MAN_AMD;
668 case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
669 info->flash_id = FLASH_MAN_FUJ;
671 case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
672 info->flash_id = FLASH_MAN_SST;
674 case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
675 info->flash_id = FLASH_MAN_STM;
677 case (CFG_FLASH_WORD_SIZE) MX_MANUFACT:
678 info->flash_id = FLASH_MAN_MX;
681 info->flash_id = FLASH_UNKNOWN;
682 info->sector_count = 0;
684 return (0); /* no or unknown flash */
687 value = addr2[1]; /* device ID */
688 DEBUGF("\nFLASH DEVICEID: %x\n", value);
691 case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
692 info->flash_id += FLASH_AM320T;
693 info->sector_count = 71;
694 info->size = 0x00400000;
696 case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
697 info->flash_id += FLASH_AM320B;
698 info->sector_count = 71;
699 info->size = 0x00400000;
701 case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
702 info->flash_id += FLASH_STMW320DT;
703 info->sector_count = 67;
704 info->size = 0x00400000;
706 case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T:
707 info->flash_id += FLASH_MXLV320T;
708 info->sector_count = 71;
709 info->size = 0x00400000;
712 info->flash_id = FLASH_UNKNOWN;
713 return (0); /* => no or unknown flash */
716 /* set up sector start address table */
717 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
718 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
719 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
720 for (i = 0; i < info->sector_count; i++)
721 info->start[i] = base + (i * 0x00010000);
722 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
723 /* set sector offsets for top boot block type */
725 i = info->sector_count;
726 /* 1 x 16k boot sector */
729 info->start[i] = base;
730 /* 2 x 8k boot sectors */
731 for (n = 0; n < 2; ++n) {
734 info->start[i] = base;
736 /* 1 x 32k boot sector */
739 info->start[i] = base;
741 while (i > 0) { /* 64k regular sectors */
744 info->start[i] = base;
746 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) {
747 i = info->sector_count - 1;
748 info->start[i--] = base + info->size - 0x00002000;
749 info->start[i--] = base + info->size - 0x00004000;
750 info->start[i--] = base + info->size - 0x00006000;
751 info->start[i--] = base + info->size - 0x00008000;
752 info->start[i--] = base + info->size - 0x0000a000;
753 info->start[i--] = base + info->size - 0x0000c000;
754 info->start[i--] = base + info->size - 0x0000e000;
755 info->start[i--] = base + info->size - 0x00010000;
758 info->start[i] = base + i * 0x00010000;
760 if (info->flash_id & FLASH_BTYPE) {
761 /* set sector offsets for bottom boot block type */
762 info->start[0] = base + 0x00000000;
763 info->start[1] = base + 0x00004000;
764 info->start[2] = base + 0x00006000;
765 info->start[3] = base + 0x00008000;
767 for (i = 4; i < info->sector_count; i++)
768 info->start[i] = base + (i * 0x00010000) - 0x00030000;
770 /* set sector offsets for top boot block type */
771 i = info->sector_count - 1;
772 info->start[i--] = base + info->size - 0x00004000;
773 info->start[i--] = base + info->size - 0x00006000;
774 info->start[i--] = base + info->size - 0x00008000;
777 info->start[i] = base + i * 0x00010000;
781 /* check for protected sectors */
782 for (i = 0; i < info->sector_count; i++) {
783 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
784 /* D0 = 1 if protected */
785 addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
787 /* For AMD29033C flash we need to resend the command of *
788 * reading flash protection for upper 8 Mb of flash */
790 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
791 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
792 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
795 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
796 info->protect[i] = 0;
798 info->protect[i] = addr2[2] & 1;
801 /* issue bank reset to return to read mode */
802 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
807 static int wait_for_DQ7_2(flash_info_t * info, int sect)
809 ulong start, now, last;
810 volatile CFG_FLASH_WORD_SIZE *addr =
811 (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
813 start = get_timer(0);
815 while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
816 (CFG_FLASH_WORD_SIZE) 0x00800080) {
817 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
821 /* show that we're waiting */
822 if ((now - last) > 1000) { /* every second */
830 static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
832 volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
833 volatile CFG_FLASH_WORD_SIZE *addr2;
834 int flag, prot, sect, l_sect;
837 if ((s_first < 0) || (s_first > s_last)) {
838 if (info->flash_id == FLASH_UNKNOWN)
839 printf("- missing\n");
841 printf("- no sectors to erase\n");
845 if (info->flash_id == FLASH_UNKNOWN) {
846 printf("Can't erase unknown flash type - aborted\n");
851 for (sect = s_first; sect <= s_last; ++sect) {
852 if (info->protect[sect])
857 printf("- Warning: %d protected sectors will not be erased!", prot);
863 /* Disable interrupts which might cause a timeout here */
864 flag = disable_interrupts();
866 /* Start erase on unprotected sectors */
867 for (sect = s_first; sect <= s_last; sect++) {
868 if (info->protect[sect] == 0) { /* not protected */
869 addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
871 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
872 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
873 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
874 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
875 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
876 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
877 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
878 for (i = 0; i < 50; i++)
879 udelay(1000); /* wait 1 ms */
881 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
882 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
883 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
884 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
885 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
886 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
890 * Wait for each sector to complete, it's more
891 * reliable. According to AMD Spec, you must
892 * issue all erase commands within a specified
893 * timeout. This has been seen to fail, especially
894 * if printf()s are included (for debug)!!
896 wait_for_DQ7_2(info, sect);
900 /* re-enable interrupts if necessary */
904 /* wait at least 80us - let's wait 1 ms */
907 /* reset to read mode */
908 addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
909 addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
915 static int write_word_2(flash_info_t * info, ulong dest, ulong data)
917 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
918 volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
919 volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
923 /* Check if Flash is (sufficiently) erased */
924 if ((*((vu_long *)dest) & data) != data)
927 for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
930 /* Disable interrupts which might cause a timeout here */
931 flag = disable_interrupts();
933 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
934 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
935 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
939 /* re-enable interrupts if necessary */
943 /* data polling for D7 */
944 start = get_timer(0);
945 while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
946 (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
948 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
955 #endif /* CFG_FLASH_2ND_16BIT_DEV */
957 /*-----------------------------------------------------------------------
960 static ulong flash_get_size(vu_long * addr, flash_info_t * info);
961 static int write_word(flash_info_t * info, ulong dest, ulong data);
963 /*-----------------------------------------------------------------------
966 unsigned long flash_init(void)
968 unsigned long total_b = 0;
969 unsigned long size_b[CFG_MAX_FLASH_BANKS];
970 unsigned short index = 0;
973 unsigned long ebc_boot_size;
974 unsigned long boot_selection;
976 mfsdr(sdr_pstrp0, val);
977 index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 28;
979 if ((index == 0xc) || (index == 8)) {
981 * Boot Settings in IIC EEprom address 0xA8 or 0xA0
982 * Read Serial Device Strap Register1 in PPC440SPe
984 mfsdr(sdr_sdstp1, val);
985 boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK;
986 ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK;
988 switch(boot_selection) {
989 case SDR0_SDSTP1_BOOT_SEL_EBC:
990 switch(ebc_boot_size) {
991 case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
994 case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
1000 case SDR0_SDSTP1_BOOT_SEL_PCI:
1005 } /*else if (index == 0) {*/
1006 /* if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE)*/
1007 /* index = 8;*/ /* sram below op code flash -> new index 8*/
1011 DEBUGF("FLASH: Index: %d\n", index);
1013 /* Init: no FLASHes known */
1014 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1015 flash_info[i].flash_id = FLASH_UNKNOWN;
1016 flash_info[i].sector_count = -1;
1017 flash_info[i].size = 0;
1019 /* check whether the address is 0 */
1020 if (flash_addr_table[index][i] == 0)
1023 /* call flash_get_size() to initialize sector address */
1024 size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i],
1027 flash_info[i].size = size_b[i];
1029 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1030 printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
1031 i, size_b[i], size_b[i] << 20);
1032 flash_info[i].sector_count = -1;
1033 flash_info[i].size = 0;
1036 /* Monitor protection ON by default */
1037 (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
1038 CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
1040 #if defined(CFG_ENV_IS_IN_FLASH)
1041 (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
1042 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
1044 #if defined(CFG_ENV_ADDR_REDUND)
1045 (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
1046 CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
1050 total_b += flash_info[i].size;