3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/processor.h>
11 extern void board_pll_init_f(void);
13 static void acadia_gpio_init(void)
16 * GPIO0 setup (select GPIO or alternate function)
18 out32(GPIO0_OSRL, CONFIG_SYS_GPIO0_OSRL);
19 out32(GPIO0_OSRH, CONFIG_SYS_GPIO0_OSRH); /* output select */
20 out32(GPIO0_ISR1L, CONFIG_SYS_GPIO0_ISR1L);
21 out32(GPIO0_ISR1H, CONFIG_SYS_GPIO0_ISR1H); /* input select */
22 out32(GPIO0_TSRL, CONFIG_SYS_GPIO0_TSRL);
23 out32(GPIO0_TSRH, CONFIG_SYS_GPIO0_TSRH); /* three-state select */
24 out32(GPIO0_TCR, CONFIG_SYS_GPIO0_TCR); /* enable output driver for outputs */
27 * Ultra (405EZ) was nice enough to add another GPIO controller
29 out32(GPIO1_OSRH, CONFIG_SYS_GPIO1_OSRH); /* output select */
30 out32(GPIO1_OSRL, CONFIG_SYS_GPIO1_OSRL);
31 out32(GPIO1_ISR1H, CONFIG_SYS_GPIO1_ISR1H); /* input select */
32 out32(GPIO1_ISR1L, CONFIG_SYS_GPIO1_ISR1L);
33 out32(GPIO1_TSRH, CONFIG_SYS_GPIO1_TSRH); /* three-state select */
34 out32(GPIO1_TSRL, CONFIG_SYS_GPIO1_TSRL);
35 out32(GPIO1_TCR, CONFIG_SYS_GPIO1_TCR); /* enable output driver for outputs */
38 int board_early_init_f(void)
42 #if !defined(CONFIG_NAND_U_BOOT)
43 /* don't reinit PLL when booting via I2C bootstrap option */
44 mfsdr(SDR0_PINSTP, reg);
45 if (reg != 0xf0000000)
51 /* Configure 405EZ for NAND usage */
52 mtsdr(SDR0_NAND0, SDR_NAND0_NDEN | SDR_NAND0_NDAREN | SDR_NAND0_NDRBEN);
53 mfsdr(SDR0_ULTRA0, reg);
54 reg &= ~SDR_ULTRA0_CSN_MASK;
55 reg |= (SDR_ULTRA0_CSNSEL0 >> CONFIG_SYS_NAND_CS) |
59 mtsdr(SDR0_ULTRA0, reg);
61 /* USB Host core needs this bit set */
62 mfsdr(SDR0_ULTRA1, reg);
63 mtsdr(SDR0_ULTRA1, reg | SDR_ULTRA1_LEDNENABLE);
65 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
66 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
67 mtdcr(UIC0CR, 0x00000010);
68 mtdcr(UIC0PR, 0xFE7FFFF0); /* set int polarities */
69 mtdcr(UIC0TR, 0x00000010); /* set int trigger levels */
70 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
77 /* Set EPLD to take PHY out of reset */
78 out8(CONFIG_SYS_CPLD_BASE + 0x05, 0x00);
85 * Check Board Identity:
90 int i = getenv_f("serial#", buf, sizeof(buf));
93 rev = in8(CONFIG_SYS_CPLD_BASE + 0);
94 printf("Board: Acadia - AMCC PPC405EZ Evaluation Board, Rev. %X", rev);