2 * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
4 * Based on Kirkwood support:
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
27 #include <asm/arch/kirkwood.h>
28 #include <asm/arch/mpp.h>
29 #include <asm/arch/gpio.h>
30 #include "netspace_v2.h"
32 DECLARE_GLOBAL_DATA_PTR;
34 int board_early_init_f(void)
36 /* Gpio configuration */
37 kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
38 NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
40 /* Multi-Purpose Pins Functionality configuration */
41 u32 kwmpp_config[] = {
49 MPP7_GPO, /* Fan speed (bit 1) */
54 MPP12_GPO, /* Red led */
55 MPP14_GPIO, /* USB fuse */
56 MPP16_GPIO, /* SATA 0 power */
57 MPP17_GPIO, /* SATA 1 power */
62 MPP22_GPIO, /* Fan speed (bit 0) */
63 MPP23_GPIO, /* Fan power */
64 MPP24_GPIO, /* USB mode select */
65 MPP25_GPIO, /* Fan rotation fail */
66 MPP26_GPIO, /* USB vbus-in detection */
67 MPP28_GPIO, /* USB enable vbus-out */
68 MPP29_GPIO, /* Blue led (slow register) */
69 MPP30_GPIO, /* Blue led (command register) */
70 MPP31_GPIO, /* Board power off */
71 MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
72 MPP33_GPIO, /* Fan speed (bit 2) */
75 kirkwood_mpp_conf(kwmpp_config);
83 gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
85 /* Boot parameters address */
86 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
91 void mv_phy_88e1116_init(char *name)
96 if (miiphy_set_current_dev(name))
99 /* command to read PHY dev address */
100 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
101 printf("Err..(%s) could not read PHY dev address\n", __func__);
106 * Enable RGMII delay on Tx and Rx for CPU port
107 * Ref: sec 4.7.2 of chip datasheet
109 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
110 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
111 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
112 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
113 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
116 if (miiphy_read(name, devadr, MII_BMCR, ®) != 0) {
117 printf("Err..(%s) PHY status read failed\n", __func__);
120 if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
121 printf("Err..(%s) PHY reset failed\n", __func__);
125 debug("88E1116 Initialized on %s\n", name);
128 /* Configure and initialize PHY */
131 mv_phy_88e1116_init("egiga0");
134 /* Return GPIO button status */
136 do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
138 return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
141 U_BOOT_CMD(button, 1, 1, do_read_button,
142 "Return GPIO button status 0=off 1=on", "");