1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016 Google, Inc
8 #include <debug_uart.h>
16 #include <asm/cpu_common.h>
17 #include <asm/mrccache.h>
20 #include <asm/processor.h>
22 #include <asm-generic/sections.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 __weak int arch_cpu_init_dm(void)
33 static int set_max_freq(void)
35 if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) {
37 * Burst Mode has been factory-configured as disabled and is not
38 * available in this physical processor package
40 debug("Burst Mode is factory-disabled\n");
44 /* Enable burst mode */
45 cpu_set_burst_mode(true);
47 /* Enable speed step */
50 /* Set P-State ratio */
51 cpu_set_p_state_to_turbo_ratio();
57 static int x86_spl_init(void)
61 * TODO(sjg@chromium.org): We use this area of RAM for the stack
62 * and global_data in SPL. Once U-Boot starts up and releocates it
63 * is not needed. We could make this a CONFIG option or perhaps
64 * place it immediately below CONFIG_SYS_TEXT_BASE.
66 __maybe_unused char *ptr = (char *)0x110000;
68 struct udevice *punit;
72 debug("%s starting\n", __func__);
74 ret = x86_cpu_reinit_f();
76 ret = x86_cpu_init_f();
79 debug("%s: spl_init() failed\n", __func__);
82 ret = arch_cpu_init();
84 debug("%s: arch_cpu_init() failed\n", __func__);
88 ret = arch_cpu_init_dm();
90 debug("%s: arch_cpu_init_dm() failed\n", __func__);
94 preloader_console_init();
96 ret = print_cpuinfo();
98 debug("%s: print_cpuinfo() failed\n", __func__);
104 debug("%s: dram_init() failed\n", __func__);
107 if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) {
108 ret = mrccache_spl_save();
110 debug("%s: Failed to write to mrccache (err=%d)\n",
114 #ifndef CONFIG_SYS_COREBOOT
116 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
118 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
119 ret = interrupt_init();
121 debug("%s: interrupt_init() failed\n", __func__);
126 * The stack grows down from ptr. Put the global data at ptr. This
127 * will only be used for SPL. Once SPL loads U-Boot proper it will
128 * set up its own stack.
130 gd->new_gd = (struct global_data *)ptr;
131 memcpy(gd->new_gd, gd, sizeof(*gd));
132 arch_setup_gd(gd->new_gd);
133 gd->start_addr_sp = (ulong)ptr;
135 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */
136 ret = mtrr_add_request(MTRR_TYPE_WRBACK,
137 (1ULL << 32) - CONFIG_XIP_ROM_SIZE,
138 CONFIG_XIP_ROM_SIZE);
140 debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret);
145 ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
147 debug("Could not find PUNIT (err=%d)\n", ret);
149 ret = set_max_freq();
151 debug("Failed to set CPU frequency (err=%d)\n", ret);
158 void board_init_f(ulong flags)
162 ret = x86_spl_init();
164 debug("Error %d\n", ret);
165 panic("x86_spl_init fail");
167 #if IS_ENABLED(CONFIG_TPL) || IS_ENABLED(CONFIG_SYS_COREBOOT)
168 gd->bd = malloc(sizeof(*gd->bd));
170 printf("Out of memory for bd_info size %x\n", sizeof(*gd->bd));
175 /* Uninit CAR and jump to board_init_f_r() */
176 board_init_f_r_trampoline(gd->start_addr_sp);
180 void board_init_f_r(void)
183 gd->flags &= ~GD_FLG_SERIAL_READY;
184 debug("cache status %d\n", dcache_status());
188 u32 spl_boot_device(void)
190 return BOOT_DEVICE_SPI_MMAP;
193 int spl_start_uboot(void)
198 void spl_board_announce_boot_device(void)
203 static int spl_board_load_image(struct spl_image_info *spl_image,
204 struct spl_boot_device *bootdev)
206 spl_image->size = CONFIG_SYS_MONITOR_LEN;
207 spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
208 spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
209 spl_image->os = IH_OS_U_BOOT;
210 spl_image->name = "U-Boot";
212 if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) {
214 * Copy U-Boot from ROM
215 * TODO(sjg@chromium.org): Figure out a way to get the text base
216 * correctly here, and in the device-tree binman definition.
218 * Also consider using FIT so we get the correct image length
221 memcpy((char *)spl_image->load_addr, (char *)0xfff00000,
225 debug("Loading to %lx\n", spl_image->load_addr);
229 SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image);
231 int spl_spi_load_image(void)
236 #ifdef CONFIG_X86_RUN_64BIT
237 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
241 printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
242 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
243 debug("ret=%d\n", ret);
248 void spl_board_init(void)
251 preloader_console_init();