2 * Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
6 * Alternatively, this software may be distributed under the terms of the
7 * GNU General Public License ("GPL") version 2 as published by the Free
13 #include <linux/compiler.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 /* Large pages are 2MB. */
18 #define LARGE_PAGE_SIZE ((1 << 20) * 2)
21 * Paging data structures.
35 typedef struct pdpe pdpt_t[512];
38 uint64_t p:1; /* present */
39 uint64_t rw:1; /* read/write */
40 uint64_t us:1; /* user/supervisor */
41 uint64_t pwt:1; /* page-level writethrough */
42 uint64_t pcd:1; /* page-level cache disable */
43 uint64_t a:1; /* accessed */
44 uint64_t d:1; /* dirty */
45 uint64_t ps:1; /* page size */
46 uint64_t g:1; /* global page */
47 uint64_t avl:3; /* available to software */
48 uint64_t pat:1; /* page-attribute table */
49 uint64_t mbz_0:8; /* must be zero */
50 uint64_t base:31; /* base address */
53 typedef struct pde pdt_t[512];
55 static pdpt_t pdpt __aligned(4096);
56 static pdt_t pdts[4] __aligned(4096);
59 * Map a virtual address to a physical address and optionally invalidate any
62 * @param virt The virtual address to use.
63 * @param phys The physical address to use.
64 * @param invlpg Whether to use invlpg to clear any old mappings.
66 static void x86_phys_map_page(uintptr_t virt, phys_addr_t phys, int invlpg)
68 /* Extract the two bit PDPT index and the 9 bit PDT index. */
69 uintptr_t pdpt_idx = (virt >> 30) & 0x3;
70 uintptr_t pdt_idx = (virt >> 21) & 0x1ff;
72 /* Set up a handy pointer to the appropriate PDE. */
73 struct pde *pde = &(pdts[pdpt_idx][pdt_idx]);
75 memset(pde, 0, sizeof(struct pde));
80 pde->base = phys >> 21;
83 /* Flush any stale mapping out of the TLBs. */
87 : "m" (*(uint8_t *)virt)
92 /* Identity map the lower 4GB and turn on paging with PAE. */
93 static void x86_phys_enter_paging(void)
95 phys_addr_t page_addr;
98 /* Zero out the page tables. */
99 memset(pdpt, 0, sizeof(pdpt));
100 memset(pdts, 0, sizeof(pdts));
102 /* Set up the PDPT. */
103 for (i = 0; i < ARRAY_SIZE(pdts); i++) {
105 pdpt[i].base = ((uintptr_t)&pdts[i]) >> 12;
108 /* Identity map everything up to 4GB. */
109 for (page_addr = 0; page_addr < (1ULL << 32);
110 page_addr += LARGE_PAGE_SIZE) {
111 /* There's no reason to invalidate the TLB with paging off. */
112 x86_phys_map_page(page_addr, page_addr, 0);
116 __asm__ __volatile__(
117 /* Load the page table address */
120 "movl %%cr4, %%eax\n\t"
121 "orl $0x00000020, %%eax\n\t"
122 "movl %%eax, %%cr4\n\t"
124 "movl %%cr0, %%eax\n\t"
125 "orl $0x80000000, %%eax\n\t"
126 "movl %%eax, %%cr0\n\t"
133 /* Disable paging and PAE mode. */
134 static void x86_phys_exit_paging(void)
136 /* Turn off paging */
137 __asm__ __volatile__ (
139 "movl %%cr0, %%eax\n\t"
140 "andl $0x7fffffff, %%eax\n\t"
141 "movl %%eax, %%cr0\n\t"
143 "movl %%cr4, %%eax\n\t"
144 "andl $0xffffffdf, %%eax\n\t"
145 "movl %%eax, %%cr4\n\t"
153 * Set physical memory to a particular value when the whole region fits on one
156 * @param map_addr The address that starts the physical page.
157 * @param offset How far into that page to start setting a value.
158 * @param c The value to set memory to.
159 * @param size The size in bytes of the area to set.
161 static void x86_phys_memset_page(phys_addr_t map_addr, uintptr_t offset, int c,
165 * U-Boot should be far away from the beginning of memory, so that's a
166 * good place to map our window on top of.
168 const uintptr_t window = LARGE_PAGE_SIZE;
170 /* Make sure the window is below U-Boot. */
171 assert(window + LARGE_PAGE_SIZE <
172 gd->relocaddr - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_STACK_SIZE);
173 /* Map the page into the window and then memset the appropriate part. */
174 x86_phys_map_page(window, map_addr, 1);
175 memset((void *)(window + offset), c, size);
179 * A physical memory anologue to memset with matching parameters and return
182 phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
184 const phys_addr_t max_addr = (phys_addr_t)~(uintptr_t)0;
185 const phys_addr_t orig_start = start;
190 /* Handle memory below 4GB. */
191 if (start <= max_addr) {
192 phys_size_t low_size = min(max_addr + 1 - start, size);
193 void *start_ptr = (void *)(uintptr_t)start;
195 assert(((phys_addr_t)(uintptr_t)start) == start);
196 memset(start_ptr, c, low_size);
201 /* Use paging and PAE to handle memory above 4GB up to 64GB. */
203 phys_addr_t map_addr = start & ~(LARGE_PAGE_SIZE - 1);
204 phys_addr_t offset = start - map_addr;
206 x86_phys_enter_paging();
208 /* Handle the first partial page. */
211 min(map_addr + LARGE_PAGE_SIZE, start + size);
212 phys_size_t cur_size = end - start;
213 x86_phys_memset_page(map_addr, offset, c, cur_size);
215 map_addr += LARGE_PAGE_SIZE;
217 /* Handle the complete pages. */
218 while (size > LARGE_PAGE_SIZE) {
219 x86_phys_memset_page(map_addr, 0, c, LARGE_PAGE_SIZE);
220 size -= LARGE_PAGE_SIZE;
221 map_addr += LARGE_PAGE_SIZE;
223 /* Handle the last partial page. */
225 x86_phys_memset_page(map_addr, 0, c, size);
227 x86_phys_exit_paging();