1 // SPDX-License-Identifier: GPL-2.0
3 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
5 * Copyright (C) 2014 Google Inc.
6 * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
15 #include <spi_flash.h>
16 #include <asm/mrccache.h>
17 #include <dm/device-internal.h>
18 #include <dm/uclass-internal.h>
20 DECLARE_GLOBAL_DATA_PTR;
22 static uint mrc_block_size(uint data_size)
24 uint mrc_size = sizeof(struct mrc_data_container) + data_size;
26 return ALIGN(mrc_size, MRC_DATA_ALIGN);
29 static struct mrc_data_container *next_mrc_block(
30 struct mrc_data_container *cache)
32 /* MRC data blocks are aligned within the region */
33 u8 *region_ptr = (u8 *)cache;
35 region_ptr += mrc_block_size(cache->data_size);
37 return (struct mrc_data_container *)region_ptr;
40 static int is_mrc_cache(struct mrc_data_container *cache)
42 return cache && (cache->signature == MRC_DATA_SIGNATURE);
45 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
47 struct mrc_data_container *cache, *next;
48 ulong base_addr, end_addr;
51 base_addr = entry->base + entry->offset;
52 end_addr = base_addr + entry->length;
55 /* Search for the last filled entry in the region */
56 for (id = 0, next = (struct mrc_data_container *)base_addr;
60 next = next_mrc_block(next);
61 if ((ulong)next >= end_addr)
66 debug("%s: No valid MRC cache found.\n", __func__);
71 if (cache->checksum != compute_ip_checksum(cache->data,
73 printf("%s: MRC cache checksum mismatch\n", __func__);
77 debug("%s: picked entry %u from cache block\n", __func__, id);
83 * find_next_mrc_cache() - get next cache entry
85 * This moves to the next cache entry in the region, making sure it has enough
86 * space to hold data of size @data_size.
88 * @entry: MRC cache flash area
89 * @cache: Entry to start from
90 * @data_size: Required data size of the new entry. Note that we assume that
91 * all cache entries are the same size
93 * @return next cache entry if found, NULL if we got to the end
95 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
96 struct mrc_data_container *prev, int data_size)
98 struct mrc_data_container *cache;
99 ulong base_addr, end_addr;
101 base_addr = entry->base + entry->offset;
102 end_addr = base_addr + entry->length;
105 * We assume that all cache entries are the same size, but let's use
106 * data_size here for clarity.
108 cache = next_mrc_block(prev);
109 if ((ulong)cache + mrc_block_size(data_size) > end_addr) {
110 /* Crossed the boundary */
112 debug("%s: no available entries found\n", __func__);
114 debug("%s: picked next entry from cache block at %p\n",
121 int mrccache_update(struct udevice *sf, struct mrc_region *entry,
122 struct mrc_data_container *cur)
124 struct mrc_data_container *cache;
129 if (!is_mrc_cache(cur)) {
130 debug("%s: Cache data not valid\n", __func__);
134 /* Find the last used block */
135 base_addr = entry->base + entry->offset;
136 debug("Updating MRC cache data\n");
137 cache = mrccache_find_current(entry);
138 if (cache && (cache->data_size == cur->data_size) &&
139 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
140 debug("MRC data in flash is up to date. No update\n");
144 /* Move to the next block, which will be the first unused block */
146 cache = find_next_mrc_cache(entry, cache, cur->data_size);
149 * If we have got to the end, erase the entire mrc-cache area and start
153 debug("Erasing the MRC cache region of %x bytes at %x\n",
154 entry->length, entry->offset);
156 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
158 debug("Failed to erase flash region\n");
161 cache = (struct mrc_data_container *)base_addr;
164 /* Write the data out */
165 offset = (ulong)cache - base_addr + entry->offset;
166 debug("Write MRC cache update to flash at %lx\n", offset);
167 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
170 debug("Failed to write to SPI flash\n");
171 return log_msg_ret("Cannot update mrccache", ret);
177 static void mrccache_setup(struct mrc_output *mrc, void *data)
179 struct mrc_data_container *cache = data;
182 cache->signature = MRC_DATA_SIGNATURE;
183 cache->data_size = mrc->len;
184 checksum = compute_ip_checksum(mrc->buf, cache->data_size);
185 debug("Saving %d bytes for MRC output data, checksum %04x\n",
186 cache->data_size, checksum);
187 cache->checksum = checksum;
189 memcpy(cache->data, mrc->buf, cache->data_size);
194 int mrccache_reserve(void)
198 for (i = 0; i < MRC_TYPE_COUNT; i++) {
199 struct mrc_output *mrc = &gd->arch.mrc[i];
204 /* adjust stack pointer to store pure cache data plus header */
205 gd->start_addr_sp -= (mrc->len + MRC_DATA_HEADER_SIZE);
206 mrccache_setup(mrc, (void *)gd->start_addr_sp);
208 gd->start_addr_sp &= ~0xf;
214 int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
215 struct mrc_region *entry)
226 * Find the flash chip within the SPI controller node. Avoid probing
227 * the device here since it may put it into a strange state where the
228 * memory map cannot be read.
230 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
232 return log_msg_ret("Cannot find SPI flash\n", ret);
233 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
235 entry->base = map_base;
237 ret = dev_read_u32_array(dev, "memory-map", reg, 2);
239 return log_msg_ret("Cannot find memory map\n", ret);
240 entry->base = reg[0];
243 /* Find the place where we put the MRC cache */
244 mrc_node = dev_read_subnode(dev, type == MRC_TYPE_NORMAL ?
245 "rw-mrc-cache" : "rw-var-mrc-cache");
246 if (!ofnode_valid(mrc_node))
247 return log_msg_ret("Cannot find node", -EPERM);
249 ret = ofnode_read_u32_array(mrc_node, "reg", reg, 2);
251 return log_msg_ret("Cannot find address", ret);
252 entry->offset = reg[0];
253 entry->length = reg[1];
257 debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n",
258 type, dev->name, entry->offset, entry->length, entry->base);
263 static int mrccache_save_type(enum mrc_type_t type)
265 struct mrc_data_container *cache;
266 struct mrc_output *mrc;
267 struct mrc_region entry;
271 mrc = &gd->arch.mrc[type];
274 log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n",
276 ret = mrccache_get_region(type, &sf, &entry);
278 return log_msg_ret("Cannot get region", ret);
279 ret = device_probe(sf);
281 return log_msg_ret("Cannot probe device", ret);
284 ret = mrccache_update(sf, &entry, cache);
286 debug("Saved MRC data with checksum %04x\n", cache->checksum);
287 else if (ret == -EEXIST)
288 debug("MRC data is the same as last time, skipping save\n");
293 int mrccache_save(void)
297 for (i = 0; i < MRC_TYPE_COUNT; i++) {
300 ret = mrccache_save_type(i);
308 int mrccache_spl_save(void)
312 for (i = 0; i < MRC_TYPE_COUNT; i++) {
313 struct mrc_output *mrc = &gd->arch.mrc[i];
317 size = mrc->len + MRC_DATA_HEADER_SIZE;
320 return log_msg_ret("Allocate MRC cache block", -ENOMEM);
321 mrccache_setup(mrc, data);
324 return mrccache_save();