3 * Graeme Russ, <graeme.russ@gmail.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 DECLARE_GLOBAL_DATA_PTR;
14 /* Get the top of usable RAM */
15 __weak ulong board_get_usable_ram_top(ulong total_size)
20 int init_cache_f_r(void)
22 #if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP)
25 ret = mtrr_commit(false);
26 /* If MTRR MSR is not implemented by the processor, just ignore it */
27 if (ret && ret != -ENOSYS)
30 /* Initialise the CPU cache(s) */
36 int init_bd_struct_r(void)
39 memset(gd->bd, 0, sizeof(bd_t));