2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/fsp/fsp_support.h>
12 DECLARE_GLOBAL_DATA_PTR;
16 phys_size_t ram_size = 0;
17 const struct hob_header *hdr;
18 struct hob_res_desc *res_desc;
20 hdr = gd->arch.hob_list;
21 while (!end_of_hob(hdr)) {
22 if (hdr->type == HOB_TYPE_RES_DESC) {
23 res_desc = (struct hob_res_desc *)hdr;
24 if (res_desc->type == RES_SYS_MEM ||
25 res_desc->type == RES_MEM_RESERVED) {
26 ram_size += res_desc->len;
29 hdr = get_next_hob(hdr);
32 gd->ram_size = ram_size;
38 void dram_init_banksize(void)
40 gd->bd->bi_dram[0].start = 0;
41 gd->bd->bi_dram[0].size = gd->ram_size;
45 * This function looks for the highest region of memory lower than 4GB which
46 * has enough space for U-Boot where U-Boot is aligned on a page boundary.
47 * It overrides the default implementation found elsewhere which simply
48 * picks the end of ram, wherever that may be. The location of the stack,
49 * the relocation address, and how far U-Boot is moved by relocation are
50 * set in the global data structure.
52 ulong board_get_usable_ram_top(ulong total_size)
54 return fsp_get_usable_lowmem_top(gd->arch.hob_list);
57 unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
59 unsigned num_entries = 0;
60 const struct hob_header *hdr;
61 struct hob_res_desc *res_desc;
63 hdr = gd->arch.hob_list;
65 while (!end_of_hob(hdr)) {
66 if (hdr->type == HOB_TYPE_RES_DESC) {
67 res_desc = (struct hob_res_desc *)hdr;
68 entries[num_entries].addr = res_desc->phys_start;
69 entries[num_entries].size = res_desc->len;
71 if (res_desc->type == RES_SYS_MEM)
72 entries[num_entries].type = E820_RAM;
73 else if (res_desc->type == RES_MEM_RESERVED)
74 entries[num_entries].type = E820_RESERVED;
78 hdr = get_next_hob(hdr);
81 /* Mark PCIe ECAM address range as reserved */
82 entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE;
83 entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE;
84 entries[num_entries].type = E820_RESERVED;