1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
11 #include <asm/cmos_layout.h>
12 #include <asm/early_cmos.h>
14 #include <asm/mrccache.h>
16 #include <asm/processor.h>
17 #include <asm/fsp/fsp_support.h>
19 DECLARE_GLOBAL_DATA_PTR;
26 int print_cpuinfo(void)
28 post_code(POST_CPU_INFO);
29 return default_print_cpuinfo();
32 int fsp_init_phase_pci(void)
36 /* call into FspNotify */
37 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
38 status = fsp_notify(NULL, INIT_PHASE_PCI);
40 debug("fail, error code %x\n", status);
44 return status ? -EPERM : 0;
47 void board_final_cleanup(void)
51 /* call into FspNotify */
52 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
53 status = fsp_notify(NULL, INIT_PHASE_BOOT);
55 debug("fail, error code %x\n", status);
60 void *fsp_prepare_mrc_cache(void)
62 struct mrc_data_container *cache;
63 struct mrc_region entry;
66 ret = mrccache_get_region(NULL, &entry);
70 cache = mrccache_find_current(&entry);
74 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
75 cache->data, cache->data_size, cache->checksum);
80 #ifdef CONFIG_HAVE_ACPI_RESUME
81 int fsp_save_s3_stack(void)
86 if (gd->arch.prev_sleep_state == ACPI_S3)
89 ret = uclass_get_device(UCLASS_RTC, 0, &dev);
91 debug("Cannot find RTC: err=%d\n", ret);
95 /* Save the stack address to CMOS */
96 ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
98 debug("Save stack address to CMOS: err=%d\n", ret);