2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/acpi_s3.h>
11 #include <asm/mrccache.h>
13 #include <asm/processor.h>
14 #include <asm/fsp/fsp_support.h>
16 DECLARE_GLOBAL_DATA_PTR;
23 int print_cpuinfo(void)
25 post_code(POST_CPU_INFO);
26 return default_print_cpuinfo();
29 int fsp_init_phase_pci(void)
33 /* call into FspNotify */
34 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
35 status = fsp_notify(NULL, INIT_PHASE_PCI);
37 debug("fail, error code %x\n", status);
41 return status ? -EPERM : 0;
44 void board_final_cleanup(void)
48 /* call into FspNotify */
49 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
50 status = fsp_notify(NULL, INIT_PHASE_BOOT);
52 debug("fail, error code %x\n", status);
59 static __maybe_unused void *fsp_prepare_mrc_cache(void)
61 struct mrc_data_container *cache;
62 struct mrc_region entry;
65 ret = mrccache_get_region(NULL, &entry);
69 cache = mrccache_find_current(&entry);
73 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
74 cache->data, cache->data_size, cache->checksum);
79 int arch_fsp_init(void)
82 int boot_mode = BOOT_FULL_CONFIG;
83 #ifdef CONFIG_HAVE_ACPI_RESUME
84 int prev_sleep_state = chipset_prev_sleep_state();
85 gd->arch.prev_sleep_state = prev_sleep_state;
88 if (!gd->arch.hob_list) {
89 #ifdef CONFIG_ENABLE_MRC_CACHE
90 nvs = fsp_prepare_mrc_cache();
95 #ifdef CONFIG_HAVE_ACPI_RESUME
96 if (prev_sleep_state == ACPI_S3) {
98 /* If waking from S3 and no cache then */
99 debug("No MRC cache found in S3 resume path\n");
100 post_code(POST_RESUME_FAILURE);
101 /* Clear Sleep Type */
102 chipset_clear_sleep_state();
104 debug("Rebooting..\n");
106 /* Should not reach here.. */
107 panic("Reboot System");
110 boot_mode = BOOT_ON_S3_RESUME;
114 * The first time we enter here, call fsp_init().
115 * Note the execution does not return to this function,
116 * instead it jumps to fsp_continue().
118 fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, boot_mode, nvs);
121 * The second time we enter here, adjust the size of malloc()
122 * pool before relocation. Given gd->malloc_base was adjusted
123 * after the call to board_init_f_init_reserve() in arch/x86/
124 * cpu/start.S, we should fix up gd->malloc_limit here.
126 gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;