1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
12 #include <asm/cmos_layout.h>
13 #include <asm/early_cmos.h>
15 #include <asm/mrccache.h>
17 #include <asm/processor.h>
18 #include <asm/fsp/fsp_support.h>
20 DECLARE_GLOBAL_DATA_PTR;
27 int print_cpuinfo(void)
29 post_code(POST_CPU_INFO);
30 return default_print_cpuinfo();
33 int fsp_init_phase_pci(void)
37 /* call into FspNotify */
38 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
39 status = fsp_notify(NULL, INIT_PHASE_PCI);
41 debug("fail, error code %x\n", status);
45 return status ? -EPERM : 0;
48 void board_final_cleanup(void)
52 /* call into FspNotify */
53 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
54 status = fsp_notify(NULL, INIT_PHASE_BOOT);
56 debug("fail, error code %x\n", status);
61 void *fsp_prepare_mrc_cache(void)
63 struct mrc_data_container *cache;
64 struct mrc_region entry;
67 ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
71 cache = mrccache_find_current(&entry);
75 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
76 cache->data, cache->data_size, cache->checksum);
81 #ifdef CONFIG_HAVE_ACPI_RESUME
82 int fsp_save_s3_stack(void)
87 if (gd->arch.prev_sleep_state == ACPI_S3)
90 ret = uclass_get_device(UCLASS_RTC, 0, &dev);
92 debug("Cannot find RTC: err=%d\n", ret);
96 /* Save the stack address to CMOS */
97 ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
99 debug("Save stack address to CMOS: err=%d\n", ret);