1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
7 #ifndef _U_BOOT_I386_H_
8 #define _U_BOOT_I386_H_ 1
12 extern char gdt_rom[];
15 int arch_cpu_init(void);
18 * x86_cpu_init_f() - Set up basic features of the x86 CPU
20 * 0 on success, -ve on error
22 int x86_cpu_init_f(void);
25 * x86_cpu_reinit_f() - Set up the CPU a second time
27 * Once cpu_init_f() has been called (e.g. in SPL) we should not call it
28 * again (e.g. in U-Boot proper) since it sets up the state from scratch.
29 * Call this function in later phases of U-Boot instead. It reads the CPU
30 * identify so that CPU functions can be used correctly, but does not change
33 * @return 0 (indicating success, to mimic cpu_init_f())
35 int x86_cpu_reinit_f(void);
38 * x86_cpu_init_tpl() - Do the minimum possible CPU init
40 * This just sets up the CPU features and figured out the identity
42 * @return 0 (indicating success, to mimic cpu_init_f())
44 int x86_cpu_init_tpl(void);
47 void setup_gdt(struct global_data *id, u64 *gdt_addr);
49 * Setup FSP execution environment GDT to use the one we used in
50 * arch/x86/cpu/start16.S and reload the segment registers.
52 void setup_fsp_gdt(void);
54 int cleanup_before_linux(void);
57 void timer_isr(void *);
58 typedef void (timer_fnc_t) (void);
59 int register_timer_isr (timer_fnc_t *isr_func);
60 unsigned long get_tbclk_mhz(void);
61 void timer_set_base(uint64_t base);
64 /* cpu/.../interrupts.c */
65 int cpu_init_interrupts(void);
67 int cleanup_before_linux(void);
68 int x86_cleanup_before_linux(void);
69 void x86_enable_caches(void);
70 void x86_disable_caches(void);
71 int x86_init_cache(void);
72 ulong board_get_usable_ram_top(ulong total_size);
73 int default_print_cpuinfo(void);
75 /* Set up a UART which can be used with printch(), printhex8(), etc. */
76 int setup_internal_uart(int enable);
78 void setup_pcat_compatibility(void);
80 void isa_unmap_rom(u32 addr);
81 u32 isa_map_rom(u32 bus_addr, int size);
83 /* arch/x86/lib/... */
84 int video_bios_init(void);
86 /* arch/x86/lib/fsp1,2/... */
89 * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
91 * At the end of pre-relocation phase, save the new stack address
92 * to CMOS and use it as the stack on next S3 boot for fsp_init()
93 * continuation function.
95 * @return: 0 if OK, -ve on error
97 int fsp_save_s3_stack(void);
99 void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
100 void board_init_f_r(void) __attribute__ ((noreturn));
102 int arch_misc_init(void);
104 /* Read the time stamp counter */
105 static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
108 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
109 return (((uint64_t)high) << 32) | low;
113 void timer_set_tsc_base(uint64_t new_base);
114 uint64_t timer_get_tsc(void);
116 void quick_ram_check(void);
118 #define PCI_VGA_RAM_IMAGE_START 0xc0000
120 #endif /* _U_BOOT_I386_H_ */