1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
9 #include <tables_csum.h>
11 #define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR
12 #define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1)
14 #define ROM_TABLE_ALIGN 1024
16 /* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
17 #define CB_TABLE_ADDR 0x800
20 * table_compute_checksum() - Compute a table checksum
22 * This computes an 8-bit checksum for the configuration table.
23 * All bytes in the configuration table, including checksum itself and
24 * reserved bytes must add up to zero.
26 * @v: configuration table base address
27 * @len: configuration table size
28 * @return: the 8-bit checksum
30 u8 table_compute_checksum(void *v, int len);
33 * table_fill_string() - Fill a string with pad in the configuration table
35 * This fills a string in the configuration table. It copies number of bytes
36 * from the source string, and if source string length is shorter than the
37 * required size to copy, pad the table string with the given pad character.
39 * @dest: where to fill a string
40 * @src: where to copy from
41 * @n: number of bytes to copy
42 * @pad: character to pad the remaining bytes
44 void table_fill_string(char *dest, const char *src, size_t n, char pad);
47 * write_tables() - Write x86 configuration tables
49 * This writes x86 configuration tables, including PIRQ routing table,
50 * Multi-Processor table and ACPI table. Whether a specific type of
51 * configuration table is written is controlled by a Kconfig option.
53 void write_tables(void);
56 * write_pirq_routing_table() - Write PIRQ routing table
58 * This writes PIRQ routing table at a given address.
60 * @start: start address to write PIRQ routing table
61 * @return: end address of PIRQ routing table
63 ulong write_pirq_routing_table(ulong start);
65 #endif /* _X86_TABLES_H_ */