2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <tables_csum.h>
12 #define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR
13 #define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1)
15 #define ROM_TABLE_ALIGN 1024
17 /* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */
18 #define CB_TABLE_ADDR 0x800
21 * table_compute_checksum() - Compute a table checksum
23 * This computes an 8-bit checksum for the configuration table.
24 * All bytes in the configuration table, including checksum itself and
25 * reserved bytes must add up to zero.
27 * @v: configuration table base address
28 * @len: configuration table size
29 * @return: the 8-bit checksum
31 u8 table_compute_checksum(void *v, int len);
34 * table_fill_string() - Fill a string with pad in the configuration table
36 * This fills a string in the configuration table. It copies number of bytes
37 * from the source string, and if source string length is shorter than the
38 * required size to copy, pad the table string with the given pad character.
40 * @dest: where to fill a string
41 * @src: where to copy from
42 * @n: number of bytes to copy
43 * @pad: character to pad the remaining bytes
45 void table_fill_string(char *dest, const char *src, size_t n, char pad);
48 * write_tables() - Write x86 configuration tables
50 * This writes x86 configuration tables, including PIRQ routing table,
51 * Multi-Processor table and ACPI table. Whether a specific type of
52 * configuration table is written is controlled by a Kconfig option.
54 void write_tables(void);
57 * write_pirq_routing_table() - Write PIRQ routing table
59 * This writes PIRQ routing table at a given address.
61 * @start: start address to write PIRQ routing table
62 * @return: end address of PIRQ routing table
64 ulong write_pirq_routing_table(ulong start);
66 #endif /* _X86_TABLES_H_ */