x86: cougarcanyon2: Update dts for SPI lock down
[oweals/u-boot.git] / arch / x86 / dts / cougarcanyon2.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
4  */
5
6 /dts-v1/;
7
8 /include/ "skeleton.dtsi"
9 /include/ "serial.dtsi"
10 /include/ "keyboard.dtsi"
11 /include/ "rtc.dtsi"
12 /include/ "tsc_timer.dtsi"
13
14 / {
15         model = "Intel Cougar Canyon 2";
16         compatible = "intel,cougarcanyon2", "intel,chiefriver";
17
18         aliases {
19                 spi0 = &spi0;
20         };
21
22         config {
23                 silent_console = <0>;
24         };
25
26         chosen {
27                 stdout-path = "/serial";
28         };
29
30         microcode {
31                 update@0 {
32 #include "microcode/m12306a2_00000008.dtsi"
33                 };
34                 update@1 {
35 #include "microcode/m12306a4_00000007.dtsi"
36                 };
37                 update@2 {
38 #include "microcode/m12306a5_00000007.dtsi"
39                 };
40                 update@3 {
41 #include "microcode/m12306a8_00000010.dtsi"
42                 };
43                 update@4 {
44 #include "microcode/m12306a9_0000001b.dtsi"
45                 };
46         };
47
48         fsp {
49                 compatible = "intel,ivybridge-fsp";
50                 fsp,enable-ht;
51         };
52
53         pci {
54                 #address-cells = <3>;
55                 #size-cells = <2>;
56                 compatible = "pci-x86";
57                 u-boot,dm-pre-reloc;
58                 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
59                           0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
60                           0x01000000 0x0 0x2000 0x2000 0 0xe000>;
61
62                 pch@1f,0 {
63                         reg = <0x0000f800 0 0 0 0>;
64                         compatible = "intel,bd82x6x";
65                         u-boot,dm-pre-reloc;
66                         #address-cells = <1>;
67                         #size-cells = <1>;
68
69                         spi0: spi {
70                                 #address-cells = <1>;
71                                 #size-cells = <0>;
72                                 compatible = "intel,ich9-spi";
73                                 intel,spi-lock-down;
74
75                                 spi-flash@0 {
76                                         reg = <0>;
77                                         compatible = "winbond,w25q64bv", "spi-flash";
78                                         memory-map = <0xff800000 0x00800000>;
79                                 };
80                         };
81
82                         gpioa {
83                                 compatible = "intel,ich6-gpio";
84                                 u-boot,dm-pre-reloc;
85                                 reg = <0 0x10>;
86                                 bank-name = "A";
87                         };
88
89                         gpiob {
90                                 compatible = "intel,ich6-gpio";
91                                 u-boot,dm-pre-reloc;
92                                 reg = <0x30 0x10>;
93                                 bank-name = "B";
94                         };
95
96                         gpioc {
97                                 compatible = "intel,ich6-gpio";
98                                 u-boot,dm-pre-reloc;
99                                 reg = <0x40 0x10>;
100                                 bank-name = "C";
101                         };
102                 };
103         };
104
105 };