3 #include <dt-bindings/gpio/x86-gpio.h>
5 /include/ "skeleton.dtsi"
6 /include/ "keyboard.dtsi"
7 /include/ "serial.dtsi"
10 /include/ "tsc_timer.dtsi"
11 /include/ "coreboot_fb.dtsi"
14 model = "Google Link";
15 compatible = "google,link", "intel,celeron-ivybridge";
33 compatible = "intel,core-gen3";
40 compatible = "intel,core-gen3";
47 compatible = "intel,core-gen3";
54 compatible = "intel,core-gen3";
62 stdout-path = "/serial";
70 compatible = "intel,x86-pinctrl";
77 direction = <PIN_INPUT>;
83 direction = <PIN_OUTPUT>;
90 direction = <PIN_INPUT>;
96 direction = <PIN_INPUT>;
102 direction = <PIN_OUTPUT>;
109 direction = <PIN_INPUT>;
116 direction = <PIN_INPUT>;
123 direction = <PIN_INPUT>;
128 gpio-offset = <0 10>;
130 direction = <PIN_INPUT>;
134 gpio-offset = <0 11>;
136 direction = <PIN_INPUT>;
140 gpio-offset = <0 12>;
142 direction = <PIN_INPUT>;
147 gpio-offset = <0 14>;
149 direction = <PIN_INPUT>;
154 gpio-offset = <0 15>;
156 direction = <PIN_INPUT>;
161 gpio-offset = <0 21>;
163 direction = <PIN_INPUT>;
167 gpio-offset = <0 24>;
170 direction = <PIN_OUTPUT>;
174 gpio-offset = <0 28>;
176 direction = <PIN_INPUT>;
180 gpio-offset = <0x30 4>;
182 direction = <PIN_OUTPUT>;
188 gpio-offset = <0x30 9>;
190 direction = <PIN_INPUT>;
195 gpio-offset = <0x30 10>;
197 direction = <PIN_INPUT>;
202 gpio-offset = <0x30 11>;
204 direction = <PIN_INPUT>;
208 gpio-offset = <0x30 25>;
210 direction = <PIN_INPUT>;
214 gpio-offset = <0x30 28>;
216 direction = <PIN_OUTPUT>;
223 compatible = "pci-x86";
224 #address-cells = <3>;
227 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
228 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
229 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
232 reg = <0x00000000 0 0 0 0>;
234 compatible = "intel,bd82x6x-northbridge";
235 board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
236 <&gpio_b 11 0>, <&gpio_a 10 0>;
239 #address-cells = <1>;
241 elpida_4Gb_1600_x16 {
244 data = [92 10 0b 03 04 19 02 02
245 03 52 01 08 0a 00 fe 00
246 69 78 69 3c 69 11 18 81
247 20 08 3c 3c 01 40 83 81
248 00 00 00 00 00 00 00 00
249 00 00 00 00 00 00 00 00
250 00 00 00 00 00 00 00 00
251 00 00 00 00 0f 11 42 00
252 00 00 00 00 00 00 00 00
253 00 00 00 00 00 00 00 00
254 00 00 00 00 00 00 00 00
255 00 00 00 00 00 00 00 00
256 00 00 00 00 00 00 00 00
257 00 00 00 00 00 00 00 00
258 00 00 00 00 00 02 fe 00
259 11 52 00 00 00 07 7f 37
260 45 42 4a 32 30 55 47 36
261 45 42 55 30 2d 47 4e 2d
262 46 20 30 20 02 fe 00 00
263 00 00 00 00 00 00 00 00
264 00 00 00 00 00 00 00 00
265 00 00 00 00 00 00 00 00
266 00 00 00 00 00 00 00 00
267 00 00 00 00 00 00 00 00
268 00 00 00 00 00 00 00 00
269 00 00 00 00 00 00 00 00
270 00 00 00 00 00 00 00 00
271 00 00 00 00 00 00 00 00
272 00 00 00 00 00 00 00 00
273 00 00 00 00 00 00 00 00
274 00 00 00 00 00 00 00 00
275 00 00 00 00 00 00 00 00];
277 samsung_4Gb_1600_1.35v_x16 {
280 data = [92 11 0b 03 04 19 02 02
281 03 11 01 08 0a 00 fe 00
282 69 78 69 3c 69 11 18 81
283 f0 0a 3c 3c 01 40 83 01
284 00 80 00 00 00 00 00 00
285 00 00 00 00 00 00 00 00
286 00 00 00 00 00 00 00 00
287 00 00 00 00 0f 11 02 00
288 00 00 00 00 00 00 00 00
289 00 00 00 00 00 00 00 00
290 00 00 00 00 00 00 00 00
291 00 00 00 00 00 00 00 00
292 00 00 00 00 00 00 00 00
293 00 00 00 00 00 00 00 00
294 00 00 00 00 00 80 ce 01
295 00 00 00 00 00 00 6a 04
296 4d 34 37 31 42 35 36 37
297 34 42 48 30 2d 59 4b 30
298 20 20 00 00 80 ce 00 00
299 00 00 00 00 00 00 00 00
300 00 00 00 00 00 00 00 00
301 00 00 00 00 00 00 00 00
302 00 00 00 00 00 00 00 00
303 00 00 00 00 00 00 00 00
304 00 00 00 00 00 00 00 00
305 00 00 00 00 00 00 00 00
306 00 00 00 00 00 00 00 00
307 00 00 00 00 00 00 00 00
308 00 00 00 00 00 00 00 00
309 00 00 00 00 00 00 00 00
310 00 00 00 00 00 00 00 00
311 00 00 00 00 00 00 00 00];
313 micron_4Gb_1600_1.35v_x16 {
315 data = [92 11 0b 03 04 19 02 02
316 03 11 01 08 0a 00 fe 00
317 69 78 69 3c 69 11 18 81
318 20 08 3c 3c 01 40 83 05
319 00 00 00 00 00 00 00 00
320 00 00 00 00 00 00 00 00
321 00 00 00 00 00 00 00 00
322 00 00 00 00 0f 01 02 00
323 00 00 00 00 00 00 00 00
324 00 00 00 00 00 00 00 00
325 00 00 00 00 00 00 00 00
326 00 00 00 00 00 00 00 00
327 00 00 00 00 00 00 00 00
328 00 00 00 00 00 00 00 00
329 00 00 00 00 00 80 2c 00
330 00 00 00 00 00 00 ad 75
331 34 4b 54 46 32 35 36 36
332 34 48 5a 2d 31 47 36 45
333 31 20 45 31 80 2c 00 00
334 00 00 00 00 00 00 00 00
335 00 00 00 00 00 00 00 00
336 00 00 00 00 00 00 00 00
337 ff ff ff ff ff ff ff ff
338 ff ff ff ff ff ff ff ff
339 ff ff ff ff ff ff ff ff
340 ff ff ff ff ff ff ff ff
341 ff ff ff ff ff ff ff ff
342 ff ff ff ff ff ff ff ff
343 ff ff ff ff ff ff ff ff
344 ff ff ff ff ff ff ff ff
345 ff ff ff ff ff ff ff ff
346 ff ff ff ff ff ff ff ff];
352 reg = <0x00001000 0 0 0 0>;
353 compatible = "intel,gma";
354 intel,dp_hotplug = <0 0 0x06>;
355 intel,panel-port-select = <1>;
356 intel,panel-power-cycle-delay = <6>;
357 intel,panel-power-up-delay = <2000>;
358 intel,panel-power-down-delay = <500>;
359 intel,panel-power-backlight-on-delay = <2000>;
360 intel,panel-power-backlight-off-delay = <2000>;
361 intel,cpu-backlight = <0x00000200>;
362 intel,pch-backlight = <0x04000000>;
366 reg = <0x0000b000 0 0 0 0>;
367 compatible = "intel,me";
372 reg = <0x0000d000 0 0 0 0>;
373 compatible = "ehci-pci";
377 reg = <0x0000e800 0 0 0 0>;
378 compatible = "ehci-pci";
382 reg = <0x0000f800 0 0 0 0>;
383 compatible = "intel,bd82x6x", "intel,pch9";
385 #address-cells = <1>;
387 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
388 0x80 0x80 0x80 0x80>;
389 intel,gpi-routing = <0 0 0 0 0 0 0 2
391 /* Enable EC SMI source */
392 intel,alt-gp-smi-enable = <0x0100>;
395 #address-cells = <1>;
397 compatible = "intel,ich9-spi";
401 #address-cells = <1>;
404 compatible = "winbond,w25q64",
406 memory-map = <0xff800000 0x00800000>;
408 label = "rw-mrc-cache";
409 reg = <0x003e0000 0x00010000>;
416 compatible = "intel,ich6-gpio";
425 compatible = "intel,ich6-gpio";
434 compatible = "intel,ich6-gpio";
443 compatible = "intel,bd82x6x-lpc";
444 #address-cells = <1>;
447 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
449 compatible = "google,cros-ec";
450 reg = <0x204 1 0x200 1 0x880 0x80>;
453 * Describes the flash memory within
456 #address-cells = <1>;
459 reg = <0x08000000 0x20000>;
460 erase-value = <0xff>;
467 compatible = "intel,pantherpoint-ahci";
468 reg = <0x0000fa00 0 0 0 0>;
470 intel,sata-mode = "ahci";
471 intel,sata-port-map = <1>;
472 intel,sata-port0-gen3-tx = <0x00880a7f>;
476 compatible = "intel,ich-i2c";
477 reg = <0x0000fb00 0 0 0 0>;
483 reg = <0xfed40000 0x5000>;
484 compatible = "infineon,slb9635lpc";
491 #include "microcode/m12306a9_0000001b.dtsi"