2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <dt-bindings/gpio/x86-gpio.h>
10 #include <dt-bindings/interrupt-router/intel-irq.h>
12 /include/ "skeleton.dtsi"
13 /include/ "keyboard.dtsi"
14 /include/ "serial.dtsi"
16 /include/ "tsc_timer.dtsi"
19 model = "Intel Bayley Bay";
20 compatible = "intel,bayleybay", "intel,baytrail";
32 stdout-path = "/serial";
41 compatible = "intel,baytrail-cpu";
48 compatible = "intel,baytrail-cpu";
55 compatible = "intel,baytrail-cpu";
62 compatible = "intel,baytrail-cpu";
69 compatible = "pci-x86";
73 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
74 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
75 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
78 reg = <0x0000f800 0 0 0 0>;
79 compatible = "intel,pch9";
84 compatible = "intel,irq-router";
85 intel,pirq-config = "ibase";
86 intel,ibase-offset = <0x50>;
87 intel,pirq-link = <8 8>;
88 intel,pirq-mask = <0xdee0>;
89 intel,pirq-routing = <
90 /* BayTrail PCI devices */
91 PCI_BDF(0, 2, 0) INTA PIRQA
92 PCI_BDF(0, 3, 0) INTA PIRQA
93 PCI_BDF(0, 16, 0) INTA PIRQA
94 PCI_BDF(0, 17, 0) INTA PIRQA
95 PCI_BDF(0, 18, 0) INTA PIRQA
96 PCI_BDF(0, 19, 0) INTA PIRQA
97 PCI_BDF(0, 20, 0) INTA PIRQA
98 PCI_BDF(0, 21, 0) INTA PIRQA
99 PCI_BDF(0, 22, 0) INTA PIRQA
100 PCI_BDF(0, 23, 0) INTA PIRQA
101 PCI_BDF(0, 24, 0) INTA PIRQA
102 PCI_BDF(0, 24, 1) INTC PIRQC
103 PCI_BDF(0, 24, 2) INTD PIRQD
104 PCI_BDF(0, 24, 3) INTB PIRQB
105 PCI_BDF(0, 24, 4) INTA PIRQA
106 PCI_BDF(0, 24, 5) INTC PIRQC
107 PCI_BDF(0, 24, 6) INTD PIRQD
108 PCI_BDF(0, 24, 7) INTB PIRQB
109 PCI_BDF(0, 26, 0) INTA PIRQA
110 PCI_BDF(0, 27, 0) INTA PIRQA
111 PCI_BDF(0, 28, 0) INTA PIRQA
112 PCI_BDF(0, 28, 1) INTB PIRQB
113 PCI_BDF(0, 28, 2) INTC PIRQC
114 PCI_BDF(0, 28, 3) INTD PIRQD
115 PCI_BDF(0, 29, 0) INTA PIRQA
116 PCI_BDF(0, 30, 0) INTA PIRQA
117 PCI_BDF(0, 30, 1) INTD PIRQD
118 PCI_BDF(0, 30, 2) INTB PIRQB
119 PCI_BDF(0, 30, 3) INTC PIRQC
120 PCI_BDF(0, 30, 4) INTD PIRQD
121 PCI_BDF(0, 30, 5) INTB PIRQB
122 PCI_BDF(0, 31, 3) INTB PIRQB
125 * PCIe root ports downstream
128 PCI_BDF(1, 0, 0) INTA PIRQA
129 PCI_BDF(1, 0, 0) INTB PIRQB
130 PCI_BDF(1, 0, 0) INTC PIRQC
131 PCI_BDF(1, 0, 0) INTD PIRQD
132 PCI_BDF(2, 0, 0) INTA PIRQB
133 PCI_BDF(2, 0, 0) INTB PIRQC
134 PCI_BDF(2, 0, 0) INTC PIRQD
135 PCI_BDF(2, 0, 0) INTD PIRQA
136 PCI_BDF(3, 0, 0) INTA PIRQC
137 PCI_BDF(3, 0, 0) INTB PIRQD
138 PCI_BDF(3, 0, 0) INTC PIRQA
139 PCI_BDF(3, 0, 0) INTD PIRQB
140 PCI_BDF(4, 0, 0) INTA PIRQD
141 PCI_BDF(4, 0, 0) INTB PIRQA
142 PCI_BDF(4, 0, 0) INTC PIRQB
143 PCI_BDF(4, 0, 0) INTD PIRQC
148 #address-cells = <1>;
150 compatible = "intel,ich9-spi";
152 #address-cells = <1>;
155 compatible = "winbond,w25q64dw",
157 memory-map = <0xff800000 0x00800000>;
159 label = "rw-mrc-cache";
160 reg = <0x006e0000 0x00010000>;
166 compatible = "intel,ich6-gpio";
173 compatible = "intel,ich6-gpio";
180 compatible = "intel,ich6-gpio";
187 compatible = "intel,ich6-gpio";
194 compatible = "intel,ich6-gpio";
201 compatible = "intel,ich6-gpio";
210 compatible = "intel,baytrail-fsp";
211 fsp,mrc-init-tseg-size = <0>;
212 fsp,mrc-init-mmio-size = <0x800>;
213 fsp,mrc-init-spd-addr1 = <0xa0>;
214 fsp,mrc-init-spd-addr2 = <0xa2>;
215 fsp,emmc-boot-mode = <2>;
223 fsp,lpss-sio-enable-pci-mode;
235 fsp,igd-dvmt50-pre-alloc = <2>;
236 fsp,aperture-size = <2>;
238 fsp,serial-debug-port-address = <0x3f8>;
239 fsp,serial-debug-port-type = <1>;
240 fsp,scc-enable-pci-mode;
241 fsp,os-selection = <4>;
242 fsp,emmc45-ddr50-enabled;
243 fsp,emmc45-retune-timer-value = <8>;
249 #include "microcode/m0230671117.dtsi"
252 #include "microcode/m0130673322.dtsi"
255 #include "microcode/m0130679901.dtsi"