1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * U-Boot - x86 Startup Code
5 * (C) Copyright 2008-2011
6 * Graeme Russ, <graeme.russ@gmail.com>
9 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
13 #include <asm/global_data.h>
15 #include <asm/processor.h>
16 #include <asm/processor-flags.h>
17 #include <generated/generic-asm-offsets.h>
18 #include <generated/asm-offsets.h>
19 #include <linux/linkage.h>
24 .type _start, @function
28 * This is the fail-safe 32-bit bootstrap entry point.
30 * This code is used when booting from another boot loader like
31 * coreboot or EFI. So we repeat some of the same init found in
37 /* Turn off cache (this might require a 486-class CPU) */
39 orl $(X86_CR0_NW | X86_CR0_CD), %eax
43 /* Tell 32-bit code it is being entered from an in-RAM copy */
44 movl $GD_FLG_WARM_BOOT, %ebx
47 * Zero the BIST (Built-In Self Test) value since we don't have it.
48 * It must be 0 or the previous loader would have reported an error.
54 /* Add a way for tools to discover the _start entry point */
59 * This is the 32-bit cold-reset entry point, coming from start16.
60 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
62 movl $GD_FLG_COLD_BOOT, %ebx
68 /* Save table pointer */
71 #ifdef CONFIG_X86_LOAD_FROM_32_BIT
75 /* Load the segement registers to match the GDT loaded in start16.S */
76 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
83 /* Clear the interrupt vectors */
87 * Critical early platform init - generally not used, we prefer init
88 * to happen later when we have a console, in case something goes
92 .globl early_board_init_ret
96 /* Initialise Cache-As-RAM */
100 #ifndef CONFIG_USE_HOB
102 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
103 * or fully initialised SDRAM - we really don't care which)
104 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
105 * and early malloc() area. The MRC requires some space at the top.
107 * Stack grows down from top of CAR. We have:
109 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
111 * global_data with x86 global descriptor table
114 * bottom-> CONFIG_SYS_CAR_ADDR
116 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
117 #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
118 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
122 * U-Boot enters here twice. For the first time it comes from
123 * car_init_done() with esp points to a temporary stack and esi
124 * set to zero. For the second time it comes from fsp_init_done()
125 * with esi holding the HOB list address returned by the FSP.
128 /* Set up global data */
130 call board_init_f_alloc_reserve
132 call board_init_f_init_reserve
134 #ifdef CONFIG_DEBUG_UART
138 /* Get address of global_data */
140 #ifdef CONFIG_USE_HOB
141 /* Store the HOB list if we have one */
144 movl %esi, GD_HOB_LIST(%edx)
146 #ifdef CONFIG_HAVE_FSP
148 * After fsp_init() returns, the stack has already been switched to a
149 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
150 * Enlarge the size of malloc() pool before relocation since we have
151 * plenty of memory now.
153 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
154 movl %esp, GD_MALLOC_BASE(%edx)
158 /* Store table pointer */
159 movl %esi, GD_TABLE(%edx)
162 movl %ebp, GD_BIST(%edx)
164 /* Set parameter to board_init_f() to boot flags */
165 post_code(POST_START_DONE)
171 /* indicate (lack of) progress */
175 .globl board_init_f_r_trampoline
176 .type board_init_f_r_trampoline, @function
177 board_init_f_r_trampoline:
179 * SDRAM has been initialised, U-Boot code has been copied into
180 * RAM, BSS has been cleared and relocation adjustments have been
181 * made. It is now time to jump into the in-RAM copy of U-Boot
183 * %eax = Address of top of new stack
186 /* Stack grows down from top of SDRAM */
189 /* See if we need to disable CAR */
192 /* Re-enter U-Boot by calling board_init_f_r() */
197 .type jump_to_spl, @function
199 /* Reset stack to the top of CAR space */
200 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
201 #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
202 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
221 .p2align 2 /* force 4-byte alignment */
223 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
230 .long -0x1BADB002 - (1 << 16)
232 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
234 .long CONFIG_SYS_TEXT_BASE
240 .long CONFIG_SYS_TEXT_BASE
242 #ifdef CONFIG_X86_LOAD_FROM_32_BIT
244 * The following Global Descriptor Table is just enough to get us into
245 * 'Flat Protected Mode' - It will be discarded as soon as the final
246 * GDT is setup in a safe location in RAM
249 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
250 .long gdt_rom2 /* base */
252 /* Some CPUs are picky about GDT alignment... */
263 * 0x18 32bit data/stack
265 /* The NULL Desciptor - Mandatory */
266 .word 0x0000 /* limit_low */
267 .word 0x0000 /* base_low */
268 .byte 0x00 /* base_middle */
269 .byte 0x00 /* access */
270 .byte 0x00 /* flags + limit_high */
271 .byte 0x00 /* base_high */
273 /* Unused Desciptor - (matches Linux) */
274 .word 0x0000 /* limit_low */
275 .word 0x0000 /* base_low */
276 .byte 0x00 /* base_middle */
277 .byte 0x00 /* access */
278 .byte 0x00 /* flags + limit_high */
279 .byte 0x00 /* base_high */
282 * The Code Segment Descriptor:
283 * - Base = 0x00000000
285 * - Access = Present, Ring 0, Exec (Code), Readable
286 * - Flags = 4kB Granularity, 32-bit
288 .word 0xffff /* limit_low */
289 .word 0x0000 /* base_low */
290 .byte 0x00 /* base_middle */
291 .byte 0x9b /* access */
292 .byte 0xcf /* flags + limit_high */
293 .byte 0x00 /* base_high */
296 * The Data Segment Descriptor:
297 * - Base = 0x00000000
299 * - Access = Present, Ring 0, Non-Exec (Data), Writable
300 * - Flags = 4kB Granularity, 32-bit
302 .word 0xffff /* limit_low */
303 .word 0x0000 /* base_low */
304 .byte 0x00 /* base_middle */
305 .byte 0x93 /* access */
306 .byte 0xcf /* flags + limit_high */
307 .byte 0x00 /* base_high */