2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 * Copyright (C) 2015 Google, Inc
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/device.h>
12 #include <asm/arch/quark.h>
14 int quark_irq_router_probe(struct udevice *dev)
16 struct quark_rcba *rcba;
19 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_RCBA, &base);
21 rcba = (struct quark_rcba *)base;
24 * Route Quark PCI device interrupt pin to PIRQ
26 * Route device#23's INTA/B/C/D to PIRQA/B/C/D
27 * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H
29 writew(PIRQC, &rcba->rmu_ir);
30 writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12),
32 writew(PIRQD, &rcba->core_ir);
33 writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12),
36 return irq_router_common_init(dev);
39 static const struct udevice_id quark_irq_router_ids[] = {
40 { .compatible = "intel,quark-irq-router" },
44 U_BOOT_DRIVER(quark_irq_router_drv) = {
45 .name = "quark_intel_irq",
47 .of_match = quark_irq_router_ids,
48 .probe = quark_irq_router_probe,