2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/qemu.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 void board_pci_setup_hose(struct pci_controller *hose)
17 hose->first_busno = 0;
20 /* PCI memory space */
21 pci_set_region(hose->regions + 0,
28 pci_set_region(hose->regions + 1,
34 pci_set_region(hose->regions + 2,
40 pci_set_region(hose->regions + 3,
44 PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
46 hose->region_count = 4;
49 int board_pci_post_scan(struct pci_controller *hose)
54 struct pci_device_id graphic_card[] = { { 0x1234, 0x1111 } };
59 * QEMU emulated graphic card shows in the PCI configuration space with
60 * PCI vendor id and device id as an artificial pair 0x1234:0x1111.
61 * It is on PCI bus 0, function 0, but device number is not consistent
62 * for the two x86 targets it supports. For i440FX and PIIX chipset
63 * board, it shows as device 2, while for Q35 and ICH9 chipset board,
64 * it shows as device 1. Here we locate its bdf at run-time based on
65 * its vendor id and device id pair so we can support both boards.
67 bdf = pci_find_devices(graphic_card, 0);
70 ret = pci_run_vga_bios(bdf, NULL, PCI_ROM_USE_NATIVE);
71 debug("BIOS ran in %lums\n", get_timer(start));
75 * i440FX and Q35 chipset have different PAM register offset, but with
76 * the same bitfield layout. Here we determine the offset based on its
79 device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID);
80 pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM;
83 * Initialize Programmable Attribute Map (PAM) Registers
85 * Configure legacy segments C/D/E/F to system RAM
87 for (i = 0; i < PAM_NUM; i++)
88 x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);