arch/x86/cpu/ivybridge/pci.c

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2008,2009
   4  * Graeme Russ, <graeme.russ@gmail.com>
   5  *
   6  * (C) Copyright 2002
   7  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #include <common.h>
  13 #include <dm.h>
  14 #include <pci.h>
  15 #include <asm/pci.h>
  16 #include <asm/post.h>
  17 #include <asm/arch/bd82x6x.h>
  18 #include <asm/arch/pch.h>
  19
  20 static int pci_ivybridge_probe(struct udevice *bus)
  21 {
  22         if (!(gd->flags & GD_FLG_RELOC))
  23                 return 0;
  24         post_code(0x50);
  25         post_code(0x51);
  26
  27         return 0;
  28 }
  29
  30 static const struct dm_pci_ops pci_ivybridge_ops = {
  31         .read_config    = pci_x86_read_config,
  32         .write_config   = pci_x86_write_config,
  33 };
  34
  35 static const struct udevice_id pci_ivybridge_ids[] = {
  36         { .compatible = "intel,pci-ivybridge" },
  37         { }
  38 };
  39
  40 U_BOOT_DRIVER(pci_ivybridge_drv) = {
  41         .name           = "pci_ivybridge",
  42         .id             = UCLASS_PCI,
  43         .of_match       = pci_ivybridge_ids,
  44         .ops            = &pci_ivybridge_ops,
  45         .probe          = pci_ivybridge_probe,
  46 };