2 * Copyright (c) 2014 Google, Inc
4 * Graeme Russ, graeme.russ@gmail.com.
6 * Some portions from coreboot src/mainboard/google/link/romstage.c
7 * Copyright (C) 2007-2010 coresystems GmbH
8 * Copyright (C) 2011 Google Inc.
10 * SPDX-License-Identifier: GPL-2.0
19 #include <asm/processor.h>
20 #include <asm/arch/pch.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 int arch_cpu_init(void)
26 const void *blob = gd->fdt_blob;
27 struct pci_controller *hose;
31 post_code(POST_CPU_INIT);
32 timer_set_base(rdtsc());
34 ret = x86_cpu_init_f();
38 ret = pci_early_init_hose(&hose);
42 node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_LPC);
45 ret = lpc_early_init(gd->fdt_blob, node, PCH_LPC_DEV);
52 int print_cpuinfo(void)
54 char processor_name[CPU_MAX_NAME_LEN];
57 /* Print processor name */
58 name = cpu_get_name(processor_name);
59 printf("CPU: %s\n", name);