arch/x86/cpu/irq.c

   1 /*
   2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <errno.h>
  10 #include <fdtdec.h>
  11 #include <malloc.h>
  12 #include <asm/io.h>
  13 #include <asm/irq.h>
  14 #include <asm/pci.h>
  15 #include <asm/pirq_routing.h>
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 static struct irq_router irq_router;
  20 static struct irq_routing_table *pirq_routing_table;
  21
  22 bool pirq_check_irq_routed(int link, u8 irq)
  23 {
  24         u8 pirq;
  25         int base = irq_router.link_base;
  26
  27         if (irq_router.config == PIRQ_VIA_PCI)
  28                 pirq = x86_pci_read_config8(irq_router.bdf,
  29                                             LINK_N2V(link, base));
  30         else
  31                 pirq = readb(irq_router.ibase + LINK_N2V(link, base));
  32
  33         pirq &= 0xf;
  34
  35         /* IRQ# 0/1/2/8/13 are reserved */
  36         if (pirq < 3 || pirq == 8 || pirq == 13)
  37                 return false;
  38
  39         return pirq == irq ? true : false;
  40 }
  41
  42 int pirq_translate_link(int link)
  43 {
  44         return LINK_V2N(link, irq_router.link_base);
  45 }
  46
  47 void pirq_assign_irq(int link, u8 irq)
  48 {
  49         int base = irq_router.link_base;
  50
  51         /* IRQ# 0/1/2/8/13 are reserved */
  52         if (irq < 3 || irq == 8 || irq == 13)
  53                 return;
  54
  55         if (irq_router.config == PIRQ_VIA_PCI)
  56                 x86_pci_write_config8(irq_router.bdf,
  57                                       LINK_N2V(link, base), irq);
  58         else
  59                 writeb(irq, irq_router.ibase + LINK_N2V(link, base));
  60 }
  61
  62 static struct irq_info *check_dup_entry(struct irq_info *slot_base,
  63                                         int entry_num, int bus, int device)
  64 {
  65         struct irq_info *slot = slot_base;
  66         int i;
  67
  68         for (i = 0; i < entry_num; i++) {
  69                 if (slot->bus == bus && slot->devfn == (device << 3))
  70                         break;
  71                 slot++;
  72         }
  73
  74         return (i == entry_num) ? NULL : slot;
  75 }
  76
  77 static inline void fill_irq_info(struct irq_info *slot, int bus, int device,
  78                                  int pin, int pirq)
  79 {
  80         slot->bus = bus;
  81         slot->devfn = (device << 3) | 0;
  82         slot->irq[pin - 1].link = LINK_N2V(pirq, irq_router.link_base);
  83         slot->irq[pin - 1].bitmap = irq_router.irq_mask;
  84 }
  85
  86 __weak void cpu_irq_init(void)
  87 {
  88         return;
  89 }
  90
  91 static int create_pirq_routing_table(void)
  92 {
  93         const void *blob = gd->fdt_blob;
  94         struct fdt_pci_addr addr;
  95         int node;
  96         int len, count;
  97         const u32 *cell;
  98         struct irq_routing_table *rt;
  99         struct irq_info *slot, *slot_base;
 100         int irq_entries = 0;
 101         int parent;
 102         int i;
 103         int ret;
 104
 105         node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IRQ_ROUTER);
 106         if (node < 0) {
 107                 debug("%s: Cannot find irq router node\n", __func__);
 108                 return -EINVAL;
 109         }
 110
 111         /* TODO(sjg@chromium.org): Drop this when PIRQ is a driver */
 112         parent = fdt_parent_offset(blob, node);
 113         if (parent < 0)
 114                 return -EINVAL;
 115         ret = fdtdec_get_pci_addr(blob, parent, FDT_PCI_SPACE_CONFIG,
 116                                   "reg", &addr);
 117         if (ret)
 118                 return ret;
 119
 120         /* extract the bdf from fdt_pci_addr */
 121         irq_router.bdf = addr.phys_hi & 0xffff00;
 122
 123         ret = fdt_find_string(blob, node, "intel,pirq-config", "pci");
 124         if (!ret) {
 125                 irq_router.config = PIRQ_VIA_PCI;
 126         } else {
 127                 ret = fdt_find_string(blob, node, "intel,pirq-config", "ibase");
 128                 if (!ret)
 129                         irq_router.config = PIRQ_VIA_IBASE;
 130                 else
 131                         return -EINVAL;
 132         }
 133
 134         ret = fdtdec_get_int(blob, node, "intel,pirq-link", -1);
 135         if (ret == -1)
 136                 return ret;
 137         irq_router.link_base = ret;
 138
 139         irq_router.irq_mask = fdtdec_get_int(blob, node,
 140                                              "intel,pirq-mask", PIRQ_BITMAP);
 141
 142         if (irq_router.config == PIRQ_VIA_IBASE) {
 143                 int ibase_off;
 144
 145                 ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0);
 146                 if (!ibase_off)
 147                         return -EINVAL;
 148
 149                 /*
 150                  * Here we assume that the IBASE register has already been
 151                  * properly configured by U-Boot before.
 152                  *
 153                  * By 'valid' we mean:
 154                  *   1) a valid memory space carved within system memory space
 155                  *      assigned to IBASE register block.
 156                  *   2) memory range decoding is enabled.
 157                  * Hence we don't do any santify test here.
 158                  */
 159                 irq_router.ibase = x86_pci_read_config32(irq_router.bdf,
 160                                                          ibase_off);
 161                 irq_router.ibase &= ~0xf;
 162         }
 163
 164         cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
 165         if (!cell || len % sizeof(struct pirq_routing))
 166                 return -EINVAL;
 167         count = len / sizeof(struct pirq_routing);
 168
 169         rt = calloc(1, sizeof(struct irq_routing_table));
 170         if (!rt)
 171                 return -ENOMEM;
 172
 173         /* Populate the PIRQ table fields */
 174         rt->signature = PIRQ_SIGNATURE;
 175         rt->version = PIRQ_VERSION;
 176         rt->rtr_bus = PCI_BUS(irq_router.bdf);
 177         rt->rtr_devfn = (PCI_DEV(irq_router.bdf) << 3) |
 178                         PCI_FUNC(irq_router.bdf);
 179         rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
 180         rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
 181
 182         slot_base = rt->slots;
 183
 184         /* Now fill in the irq_info entries in the PIRQ table */
 185         for (i = 0; i < count;
 186              i++, cell += sizeof(struct pirq_routing) / sizeof(u32)) {
 187                 struct pirq_routing pr;
 188
 189                 pr.bdf = fdt_addr_to_cpu(cell[0]);
 190                 pr.pin = fdt_addr_to_cpu(cell[1]);
 191                 pr.pirq = fdt_addr_to_cpu(cell[2]);
 192
 193                 debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n",
 194                       i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
 195                       PCI_FUNC(pr.bdf), 'A' + pr.pin - 1,
 196                       'A' + pr.pirq);
 197
 198                 slot = check_dup_entry(slot_base, irq_entries,
 199                                        PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
 200                 if (slot) {
 201                         debug("found entry for bus %d device %d, ",
 202                               PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
 203
 204                         if (slot->irq[pr.pin - 1].link) {
 205                                 debug("skipping\n");
 206
 207                                 /*
 208                                  * Sanity test on the routed PIRQ pin
 209                                  *
 210                                  * If they don't match, show a warning to tell
 211                                  * there might be something wrong with the PIRQ
 212                                  * routing information in the device tree.
 213                                  */
 214                                 if (slot->irq[pr.pin - 1].link !=
 215                                         LINK_N2V(pr.pirq, irq_router.link_base))
 216                                         debug("WARNING: Inconsistent PIRQ routing information\n");
 217                                 continue;
 218                         }
 219                 } else {
 220                         slot = slot_base + irq_entries++;
 221                 }
 222                 debug("writing INT%c\n", 'A' + pr.pin - 1);
 223                 fill_irq_info(slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), pr.pin,
 224                               pr.pirq);
 225         }
 226
 227         rt->size = irq_entries * sizeof(struct irq_info) + 32;
 228
 229         pirq_routing_table = rt;
 230
 231         return 0;
 232 }
 233
 234 int irq_router_common_init(struct udevice *dev)
 235 {
 236         int ret;
 237
 238         cpu_irq_init();
 239
 240         ret = create_pirq_routing_table();
 241         if (ret) {
 242                 debug("Failed to create pirq routing table\n");
 243                 return ret;
 244         }
 245         /* Route PIRQ */
 246         pirq_route_irqs(pirq_routing_table->slots,
 247                         get_irq_slot_count(pirq_routing_table));
 248
 249         return 0;
 250 }
 251
 252 int irq_router_probe(struct udevice *dev)
 253 {
 254         return irq_router_common_init(dev);
 255 }
 256
 257 u32 write_pirq_routing_table(u32 addr)
 258 {
 259         if (!pirq_routing_table)
 260                 return addr;
 261
 262         return copy_pirq_routing_table(addr, pirq_routing_table);
 263 }
 264
 265 static const struct udevice_id irq_router_ids[] = {
 266         { .compatible = "intel,irq-router" },
 267         { }
 268 };
 269
 270 U_BOOT_DRIVER(irq_router_drv) = {
 271         .name           = "intel_irq",
 272         .id             = UCLASS_IRQ,
 273         .of_match       = irq_router_ids,
 274         .probe          = irq_router_probe,
 275 };
 276
 277 UCLASS_DRIVER(irq) = {
 278         .id             = UCLASS_IRQ,
 279         .name           = "irq",
 280 };